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Searched refs:PCC_CLKCFG_PR_MASK (Results 1 – 25 of 67) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h645 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
657 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
671 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
690 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrc()
721 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h645 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
657 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
671 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
690 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrc()
721 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h123 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
882 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
894 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
908 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
927 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
958 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h123 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
882 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
894 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
908 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
927 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
958 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.h725 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
737 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
751 assert((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
770 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
801 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h608 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
620 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
639 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
669 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/
Dfsl_clock.h619 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
631 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
650 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
680 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h648 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
660 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
674 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
693 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h609 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
621 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
640 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
670 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/
Dfsl_clock.h627 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
639 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
658 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
688 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.h655 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
667 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
681 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
700 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h606 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
618 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
637 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
667 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/
Dfsl_clock.h626 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
638 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
657 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
687 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h646 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
658 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
672 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
691 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h646 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
658 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
672 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
691 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h640 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
652 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
666 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
685 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h596 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
608 assert((*(volatile uint32_t *)((uint32_t)name)) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
627 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h592 assert(((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_EnableClock()
604 assert(((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_DisableClock()
623 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h584 assert(((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_EnableClock()
596 assert(((*(volatile uint32_t *)(uint32_t)name) & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_DisableClock()
615 assert(reg & PCC_CLKCFG_PR_MASK); in CLOCK_SetIpSrc()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/
Dfsl_clock.h148 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
1540 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
1553 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
1568 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/
Dfsl_clock.h148 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
1540 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
1553 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
1568 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/
Dfsl_clock.h148 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
1540 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
1553 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
1568 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/
Dfsl_clock.h148 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
1540 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
1553 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
1568 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/
Dfsl_clock.h148 #define PCC_CLKCFG_PR_MASK (0x80000000U) macro
1540 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_EnableClock()
1553 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_DisableClock()
1568 assert(PCC_REG(name) & PCC_CLKCFG_PR_MASK); in CLOCK_IsEnabledByOtherCore()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8ulp/
Dboard.c1863 if (pcc5_0[i][1] & PCC_CLKCFG_PR_MASK) in BOARD_LpavInit()
1871 if (pcc5_1[i][1] & PCC_CLKCFG_PR_MASK) in BOARD_LpavInit()
2023 if (val & PCC_CLKCFG_PR_MASK) in BOARD_LpavSave()
2033 if (val & PCC_CLKCFG_PR_MASK) in BOARD_LpavSave()

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