Home
last modified time | relevance | path

Searched refs:PACKET_RAM_CTRL (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Ddbg_ram_capture.c59 …XCVR_MISC->PACKET_RAM_CTRL |= XCVR_CTRL_PACKET_RAM_CTRL_XCVR_RAM_ALLOW_MASK; /* Make PKT RAM avai… in dbg_ram_init()
87 temp = XCVR_MISC->PACKET_RAM_CTRL & ~XCVR_CTRL_PACKET_RAM_CTRL_DBG_PAGE_MASK; in dbg_ram_capture()
93 … XCVR_MISC->PACKET_RAM_CTRL = temp | XCVR_CTRL_PACKET_RAM_CTRL_DBG_PAGE(dbg_page); in dbg_ram_capture()
95 … while (!(XCVR_MISC->PACKET_RAM_CTRL & XCVR_CTRL_PACKET_RAM_CTRL_DBG_RAM_FULL(2))) in dbg_ram_capture()
123 … XCVR_MISC->PACKET_RAM_CTRL = temp | XCVR_CTRL_PACKET_RAM_CTRL_DBG_PAGE(dbg_page); in dbg_ram_capture()
124 … while (!(XCVR_MISC->PACKET_RAM_CTRL & XCVR_CTRL_PACKET_RAM_CTRL_DBG_RAM_FULL(2))) in dbg_ram_capture()
151 …XCVR_MISC->PACKET_RAM_CTRL &= ~XCVR_CTRL_PACKET_RAM_CTRL_DBG_PAGE_MASK; /* Clear DBG_PAGE to termi… in dbg_ram_capture()
155 …XCVR_MISC->PACKET_RAM_CTRL &= ~XCVR_CTRL_PACKET_RAM_CTRL_XCVR_RAM_ALLOW_MASK; /* Make PKT RAM avai… in dbg_ram_capture()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h8345 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM CONTROL, offset: 0x20 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h8274 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM CONTROL, offset: 0x20 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h8345 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM CONTROL, offset: 0x20 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h27204 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM Control Register, offset: 0x1C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h29373 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM Control Register, offset: 0x1C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h34239 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM Control Register, offset: 0x1C */ member
DMCXW727C_cm33_core1.h39432 __IO uint32_t PACKET_RAM_CTRL; /**< PACKET RAM Control Register, offset: 0x1C */ member