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Searched refs:OCTRL (Results 1 – 25 of 56) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/pwm/
Dfsl_pwm.c536 base->SM[subModule].OCTRL &= ~((uint16_t)PWM_OCTRL_PWMAFS_MASK); in PWM_SetupPwm()
537 …base->SM[subModule].OCTRL |= (((uint16_t)(chnlParams->faultState) << (uint16_t)PWM_OCTRL_PWMAFS_SH… in PWM_SetupPwm()
541 base->SM[subModule].OCTRL &= ~((uint16_t)PWM_OCTRL_PWMBFS_MASK); in PWM_SetupPwm()
542 …base->SM[subModule].OCTRL |= (((uint16_t)(chnlParams->faultState) << (uint16_t)PWM_OCTRL_PWMBFS_SH… in PWM_SetupPwm()
553 base->SM[subModule].OCTRL &= ~((uint16_t)1U << (uint16_t)polarityShift); in PWM_SetupPwm()
557 base->SM[subModule].OCTRL |= ((uint16_t)1U << (uint16_t)polarityShift); in PWM_SetupPwm()
1190 if (0U != (base->SM[subModule].OCTRL & PWM_OCTRL_POLA_MASK)) in PWM_SetOutputToIdle()
1211 if (0U != (base->SM[subModule].OCTRL & PWM_OCTRL_POLB_MASK)) in PWM_SetOutputToIdle()
Dfsl_pwm.h1088 uint16_t reg = base->SM[subModule].OCTRL; in PWM_SetPwmFaultState()
1107 base->SM[subModule].OCTRL = reg; in PWM_SetPwmFaultState()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h19921 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h21687 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h23381 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h23381 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h23381 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h23381 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h30622 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h30622 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h30622 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h31240 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h31240 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h31240 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h27261 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h24651 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h34376 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h34376 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h31325 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h31304 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h34097 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h32708 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h35948 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h35415 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h34847 …__IO uint16_t OCTRL; /**< Output Control Register, array offset: 0x22,… member

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