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Searched refs:OCOTP_SCS_SET_SPARE_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h21250 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
21253 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h24199 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
24202 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h28242 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
28245 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h28263 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
28266 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h29314 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
29317 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h30629 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
30631 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h32021 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
32024 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h32480 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
32482 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h31371 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
31373 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h34013 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
34015 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h41689 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
41691 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h34006 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
34008 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h43862 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
43864 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h43862 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
43864 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h27986 #define OCOTP_SCS_SET_SPARE_MASK 0x7FFFFFFEu macro
27988 … (((uint32_t)(((uint32_t)(x))<<OCOTP_SCS_SET_SPARE_SHIFT))&OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h43862 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
43864 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h43862 #define OCOTP_SCS_SET_SPARE_MASK (0x7FFFFFFEU) macro
43864 … (((uint32_t)(((uint32_t)(x)) << OCOTP_SCS_SET_SPARE_SHIFT)) & OCOTP_SCS_SET_SPARE_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h31424 #define OCOTP_SCS_SET_SPARE_MASK 0x7FFFFFFEu macro
31426 … (((uint32_t)(((uint32_t)(x))<<OCOTP_SCS_SET_SPARE_SHIFT))&OCOTP_SCS_SET_SPARE_MASK)