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Searched refs:NVIC_GetEnableIRQ (Results 1 – 25 of 25) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_dsp.h63 #define NVIC_GetEnableIRQ(value) do {} while(0) macro
Dcore_cm0.h578 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm1.h605 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_sc000.h706 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm0plus.h696 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_armv8mbl.h1191 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_sc300.h1416 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm3.h1433 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm23.h1266 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm4.h1606 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_armv8mml.h1966 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm35p.h2041 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm7.h1829 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm33.h2041 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_armv81mml.h2122 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c352 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterRbb()
399 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterFbb()
445 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterNbb()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c352 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterRbb()
399 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterFbb()
445 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterNbb()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c375 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
422 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
469 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c375 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
422 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
469 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c375 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
422 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
469 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/drivers/common/
Dfsl_common_dsp.h96 #define NVIC_GetEnableIRQ(value) do {} while(0) macro
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm0plus.h696 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm4.h1611 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm7.h1838 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
Dcore_cm33.h2292 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro