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Searched refs:NPU_RESBASE_BASE_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h47900 #define NPU_RESBASE_BASE_MASK (0xFFFFFFFFU) macro
47903 … (((uint32_t)(((uint32_t)(x)) << NPU_RESBASE_BASE_SHIFT)) & NPU_RESBASE_BASE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_ezhv.h50662 #define NPU_RESBASE_BASE_MASK (0xFFFFFFFFU) macro
50665 … (((uint32_t)(((uint32_t)(x)) << NPU_RESBASE_BASE_SHIFT)) & NPU_RESBASE_BASE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_ezhv.h50638 #define NPU_RESBASE_BASE_MASK (0xFFFFFFFFU) macro
50641 … (((uint32_t)(((uint32_t)(x)) << NPU_RESBASE_BASE_SHIFT)) & NPU_RESBASE_BASE_MASK)