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Searched refs:NPU_ID_CANVAS_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h47919 #define NPU_ID_CANVAS_MASK (0x100U) macro
47922 … (((uint32_t)(((uint32_t)(x)) << NPU_ID_CANVAS_SHIFT)) & NPU_ID_CANVAS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_ezhv.h50681 #define NPU_ID_CANVAS_MASK (0x100U) macro
50684 … (((uint32_t)(((uint32_t)(x)) << NPU_ID_CANVAS_SHIFT)) & NPU_ID_CANVAS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_ezhv.h50657 #define NPU_ID_CANVAS_MASK (0x100U) macro
50660 … (((uint32_t)(((uint32_t)(x)) << NPU_ID_CANVAS_SHIFT)) & NPU_ID_CANVAS_MASK)