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Searched refs:NETC_F3_PSICFGR0_NUM_RX_BDR_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_NETC_F3.h998 #define NETC_F3_PSICFGR0_NUM_RX_BDR_MASK (0x7F0000U) macro
1001 …int32_t)(((uint32_t)(x)) << NETC_F3_PSICFGR0_NUM_RX_BDR_SHIFT)) & NETC_F3_PSICFGR0_NUM_RX_BDR_MASK)
/hal_nxp-latest/s32/drivers/s32ze/Eth_NETC/src/
DNetc_Eth_Ip_Irq.c575 …>NUM_SI[siHwId].PSICFGR0 &= ~(NETC_F3_PSICFGR0_NUM_TX_BDR_MASK | NETC_F3_PSICFGR0_NUM_RX_BDR_MASK); in Netc_Eth_Ip_InitVSIAfterFlr()
DNetc_Eth_Ip.c7192 …>NUM_SI[siHwId].PSICFGR0 &= ~(NETC_F3_PSICFGR0_NUM_TX_BDR_MASK | NETC_F3_PSICFGR0_NUM_RX_BDR_MASK);