1 /* 2 * Copyright 2021-2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETH_IP_TYPES_H 8 #define NETC_ETH_IP_TYPES_H 9 10 /** 11 * @file Netc_Eth_Ip_Types.h 12 * 13 * @addtogroup NETC_ETH_DRIVER NETC_ETH Driver 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Netc_Eth_Ip_Cfg_Defines.h" 28 #include "Netc_Eth_Ip_Features.h" 29 #include "Netc_Eth_Ip_Cfg.h" 30 31 /*================================================================================================== 32 * SOURCE FILE VERSION INFORMATION 33 ==================================================================================================*/ 34 #define NETC_ETH_IP_TYPES_VENDOR_ID 43 35 #define NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 36 #define NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 37 #define NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 38 #define NETC_ETH_IP_TYPES_SW_MAJOR_VERSION 2 39 #define NETC_ETH_IP_TYPES_SW_MINOR_VERSION 0 40 #define NETC_ETH_IP_TYPES_SW_PATCH_VERSION 0 41 42 /*================================================================================================== 43 * FILE VERSION CHECKS 44 ==================================================================================================*/ 45 /* Checks against Netc_Eth_Ip_Cfg_Defines.h */ 46 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_CFG_DEFINES_VENDOR_ID) 47 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h have different vendor ids" 48 #endif 49 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 50 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 51 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 52 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h are different" 53 #endif 54 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 55 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 56 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_PATCH_VERSION) \ 57 ) 58 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h are different" 59 #endif 60 61 /* Checks against Netc_Eth_Ip_Features.h */ 62 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_FEATURES_VENDOR_ID) 63 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h have different vendor ids" 64 #endif 65 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_MAJOR_VERSION) || \ 66 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_MINOR_VERSION) || \ 67 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_REVISION_VERSION)) 68 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h are different" 69 #endif 70 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_FEATURES_SW_MAJOR_VERSION) || \ 71 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_FEATURES_SW_MINOR_VERSION) || \ 72 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_FEATURES_SW_PATCH_VERSION) \ 73 ) 74 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h are different" 75 #endif 76 77 /* Checks against Netc_Eth_Ip_Cfg.h */ 78 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_CFG_VENDOR_ID) 79 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h have different vendor ids" 80 #endif 81 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 82 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 83 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_REVISION_VERSION)) 84 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h are different" 85 #endif 86 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_CFG_SW_MAJOR_VERSION) || \ 87 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_CFG_SW_MINOR_VERSION) || \ 88 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_CFG_SW_PATCH_VERSION) \ 89 ) 90 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h are different" 91 #endif 92 /*================================================================================================== 93 * CONSTANTS 94 ==================================================================================================*/ 95 96 /*================================================================================================== 97 * DEFINES AND MACROS 98 ==================================================================================================*/ 99 100 /*! 101 * @brief CMBDR requeste length field. 102 */ 103 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT (20U) 104 /*! 105 * @brief CMBDR requeste length field mask. 106 */ 107 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK (0xFFF00000UL) 108 /*! 109 * @brief CMBDR requeste lengtht. 110 */ 111 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK) 112 113 /*! 114 * @brief CMBDR response length field. 115 */ 116 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT (0U) 117 /*! 118 * @brief CMBDR response length field mask. 119 */ 120 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK (0x000FFFFFUL) 121 /*! 122 * @brief CMBDR response length. 123 */ 124 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK) 125 126 /** @brief CMD field */ 127 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT (0U) 128 /** @brief CMD field mask */ 129 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK (0x0000000FUL) 130 /** @brief CMD field set */ 131 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK) 132 133 /*! 134 * @brief CMBDR request config access method field. 135 */ 136 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT (12U) 137 /*! 138 * @brief CMBDR request config access method field mask. 139 */ 140 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK (0x00003000UL) 141 /*! 142 * @brief CMBDR request config field access method. 143 */ 144 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK) 145 146 /*! 147 * @brief CMBDR request config field table id. 148 */ 149 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT (16U) 150 /*! 151 * @brief CMBDR request config field table id mask. 152 */ 153 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK (0x00FF0000UL) 154 /*! 155 * @brief CMBDR request config table id. 156 */ 157 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK) 158 159 /*! 160 * @brief CMBDR request version field. 161 */ 162 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT (24U) 163 /*! 164 * @brief CMBDR request version field mask. 165 */ 166 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK (0x3F000000UL) 167 /*! 168 * @brief CMBDR request version. 169 */ 170 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK) 171 172 /*! 173 * @brief CMBDR request config field. 174 */ 175 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT (30U) 176 /*! 177 * @brief CMBDR request config field mask. 178 */ 179 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK (0x4F000000UL) 180 /*! 181 * @brief CMBDR request config. 182 */ 183 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK) 184 185 /*! 186 * @brief CMBDR request RR field. 187 */ 188 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT (31U) 189 /*! 190 * @brief CMBDR request RR field mask. 191 */ 192 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK (0x80000000UL) 193 /*! 194 * @brief CMBDR request RR. 195 */ 196 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK) 197 198 /*! 199 * @brief CMBDR request NPF field. 200 */ 201 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT (15U) 202 /*! 203 * @brief CMBDR request NPF field mask. 204 */ 205 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_MASK (0x00008000UL) 206 /*! 207 * @brief CMBDR request NPF. 208 */ 209 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_MASK) 210 211 #define NETC_ETH_IP_RSPHEADER_STATUS_FIELD_INDEX (0x3U) /*!< status field includes RR bit, ERROR field and NUM_MATCHED field in Response Header Format */ 212 213 /* +++definitions for NTMP response message+++ */ 214 /*! 215 * @brief CMBDR RR status field. 216 */ 217 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_SHIFT (31U) 218 /*! 219 * @brief CMBDR RR status field mask. 220 */ 221 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_MASK (0x80000000UL) 222 223 /*! 224 * @brief CMBDR error status field. 225 */ 226 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_SHIFT (16U) 227 /*! 228 * @brief CMBDR error status field mask. 229 */ 230 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_MASK (0x0FFF0000UL) 231 232 /*! 233 * @brief CMBDR status field num matched. 234 */ 235 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_SHIFT (0U) 236 /*! 237 * @brief CMBDR status field num matched mask. 238 */ 239 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_MASK (0x0000FFFFUL) 240 /* ---definitions for NTMP response message--- */ 241 242 /* +++definitions for NTMP V1.0 CBD fields+++ */ 243 /** @brief EN field */ 244 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_SHIFT (31U) 245 /** @brief EN field mask */ 246 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_MASK (0xF0000000UL) 247 /** @brief EN field set */ 248 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_MASK) 249 250 /** @brief SF field */ 251 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_SHIFT (31U) 252 /** @brief SF field mask */ 253 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_MASK (0xF0000000UL) 254 /** @brief SF field set */ 255 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_MASK) 256 257 /** @brief CI field */ 258 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_SHIFT (30U) 259 /** @brief CI field mask */ 260 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_MASK (0xF0000000UL) 261 /** @brief CI field set */ 262 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_MASK) 263 264 /** @brief STATUS field */ 265 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_SHIFT (24U) 266 /** @brief STATUS field mask */ 267 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_MASK (0xFF000000UL) 268 /** @brief STATUS field set */ 269 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_MASK) 270 271 /** @brief CLASS field */ 272 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_SHIFT (8U) 273 /** @brief CLASS field mask */ 274 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_MASK (0xFFFFFF00UL) 275 /** @brief CLASS field set */ 276 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_MASK) 277 278 /** @brief COMMAND field */ 279 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_SHIFT (0U) 280 /** @brief COMMAND field mask */ 281 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_MASK (0xFFFFFFFFUL) 282 /** @brief COMMAND field set */ 283 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_MASK) 284 285 /** @brief STATUS field shift */ 286 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_LEFT_SHIFT (3U) 287 /** @brief STATUS field mask */ 288 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RIGHT_SHIFT (27U) 289 /** @brief STATUS field get */ 290 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_GET_STATUS(x) (uint8)(((x) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_LEFT_SHIFT) >> NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RIGHT_SHIFT) 291 292 /** @brief STATUS field shift */ 293 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RFS_LEFT_SHIFT (4U) 294 /** @brief STATUS field mask */ 295 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RFS_RIGHT_SHIFT (28U) 296 /** @brief STATUS field get */ 297 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RFS_GET_STATUS(x) (uint8)(((x) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RFS_LEFT_SHIFT) >> NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RFS_RIGHT_SHIFT) 298 299 /** @brief TPID field */ 300 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT (16U) 301 /** @brief TPID field set mask */ 302 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SET_MASK (0x000F0000UL) 303 /** @brief TPID field get mask */ 304 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_GET_MASK (0x0000000FUL) 305 /** @brief TPID field set */ 306 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SET_TPID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SET_MASK) 307 /** @brief TPID field get */ 308 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_GET_TPID(x) (((uint32)(((uint32)(x)) >> NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_GET_MASK) 309 /* ---definitions for NTMP V1.0 CBD fields--- */ 310 311 312 #define NETC_ETH_RFS_ENTRY_SET_DATA_BUFFER_SIZE (116U/4U) /*there are a total of 116bytes for RFS table which will be loaded into a uint32 array*/ 313 /*! 314 * @brief Time Gate Scheduling Table CFGE_DATA field. 315 */ 316 /* Administrative Traffic Class Gate States for Gate Entry */ 317 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT (0U) 318 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK (0x000000FFUL) 319 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT)) & NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK) 320 321 /* Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 322 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT (16U) 323 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK (0x000F0000UL) 324 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT)) & NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK) 325 326 /*! 327 * @brief Tables Request Data Buffer CFGEU field. 328 */ 329 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT (0U) 330 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK (0x00000001UL) 331 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK) 332 333 /*! 334 * @brief Tables Request Data Buffer QUERY_ACTIONS field. 335 */ 336 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT (24U) 337 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK (0x0F000000UL) 338 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK) 339 340 /*! 341 * @brief Tables Request Data Buffer TABLE_VERSION field. 342 */ 343 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT (28U) 344 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK (0xF0000000UL) 345 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSIONS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK) 346 347 /*! 348 * @brief Eth Rate Policer Table Request Data Buffer FEEU field. 349 */ 350 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT (1U) 351 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK (0x00000002UL) 352 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK) 353 354 /*! 355 * @brief Eth Rate Policer Table Request Data Buffer PSEU field. 356 */ 357 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT (2U) 358 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK (0x00000004UL) 359 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK) 360 361 /*! 362 * @brief Eth Rate Policer Table Request Data Buffer STSEU field. 363 */ 364 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (3U) 365 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000008UL) 366 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 367 368 /*! 369 * @brief Eth Rate Policer Table FEE_DATA Format 370 */ 371 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT (0U) 372 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK (0x00000001UL) 373 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK) 374 375 /*! 376 * @brief Eth Rate Policer Table CFGE_DATA config bits Format 377 */ 378 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT (0U) 379 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK (0x00000001UL) 380 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK) 381 382 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT (1U) 383 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK (0x00000002UL) 384 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK) 385 386 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT (2U) 387 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK (0x00000004UL) 388 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK) 389 390 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT (3U) 391 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK (0x00000008UL) 392 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK) 393 394 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT (4U) 395 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK (0x00000010UL) 396 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK) 397 398 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT (5U) 399 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK (0x00000060UL) 400 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK) 401 402 /*! 403 * @brief Ingress Port Filter table CFGE_DATA config field. 404 */ 405 /* IPV field */ 406 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT (0U) 407 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK (0x0000000FUL) 408 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK) 409 410 /* OIPV */ 411 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT (4U) 412 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK (0x00000010UL) 413 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK) 414 415 /* DR */ 416 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT (5U) 417 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_MASK (0x00000060UL) 418 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_MASK) 419 420 /* ODR */ 421 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT (7U) 422 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK (0x00000080UL) 423 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK) 424 425 /* FLTFA */ 426 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT (8U) 427 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK (0x00000300UL) 428 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK) 429 430 /* WOLTE */ 431 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT (12U) 432 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK (0x00001000UL) 433 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK) 434 /* FLTA */ 435 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT (13U) 436 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK (0x00006000UL) 437 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK) 438 439 /* RPR */ 440 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT (15U) 441 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK (0x00018000UL) 442 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK) 443 444 /*! 445 * @brief Ingress Port Filter table KEYE_DATA field. 446 */ 447 /* DSCP field */ 448 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT (0U) 449 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK (0x0000003FUL) 450 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK) 451 452 /* DSCP Mask field */ 453 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT (6U) 454 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK (0x00000FC0UL) 455 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK) 456 457 /* SRC_PORT field */ 458 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT (16U) 459 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK (0x001F0000UL) 460 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK) 461 462 /* SRC_PORT Mask field */ 463 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT (21U) 464 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK (0x03E00000UL) 465 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK) 466 467 /*! 468 * @brief Ingress Port Filter table Request Data Buffer STSEU field. 469 */ 470 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 471 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 472 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 473 474 /*! 475 * @brief Filter Forwarding Action data type definitions for Ingress Port Filter Table. 476 */ 477 typedef uint32 Netc_Eth_Ip_CfgeFilterForwardingActionDataType; 478 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_DISCARDFRAMES (0x0U) /*!< discard frames */ 479 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_PERMITFRAMES (0x1U) /*!< permit frames */ 480 481 /*! 482 * @brief Filter Action data type definitions for Ingress Port Filter Table. 483 */ 484 typedef uint32 Netc_Eth_Ip_CfgeFilterActionDataType; 485 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_NOACTION (0x0U) /*!< no action */ 486 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_RATEACTION (0x1U) /*!< Rate action with the Rate Policer Entry ID (RP_EID) set to the value configured in the FLTA_TGT field of this entry */ 487 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_INGRESSSTREAMIDENTIFICATIONACTION (0x2U) /*!< Ingress stream identification action where the Ingress Stream Entry ID (IS_EID) is set to the value configured in the FLTA_TGT field of this entry */ 488 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_SETTINGL2FILTERINGSIBITMAP (0x3U) /*!< valid on ENETC side. Setting a pre L2 filtering SI bitmap that will be used by the L2 filtering function to determine the final SI bitmap */ 489 490 typedef uint32 Netc_Eth_Ip_EnetcForwardingActionDataType; 491 #define NETC_ETH_IP_ENETC_DISCARDFRAMES (0x0U) /*!< discard frames */ 492 #define NETC_ETH_IP_ENETC_ALLOWWITHOUTSIBITMAP (0x1U) /*!< Allow without setting the pre L2 filtering SI bitmap. */ 493 #define NETC_ETH_IP_SWT_ALLOWWITHSIBITMAP (0x2U) /*!< Allow with setting the pre L2 filtering SI bitmap to the value configured in the SI_MAP field of this entry. */ 494 495 /*! 496 * @brief Ingres Stream Identification (ISI) Table KEYE_DATA bits Format 497 */ 498 #define NETC_ETH_IP_ISITABLE_KEYE_KEYTYPE_SHIFT (0U) 499 #define NETC_ETH_IP_ISITABLE_KEYE_KEYTYPE_MASK (0x00000003UL) 500 #define NETC_ETH_IP_ISITABLE_KEYE_KEYTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ISITABLE_KEYE_KEYTYPE_SHIFT)) & NETC_ETH_IP_ISITABLE_KEYE_KEYTYPE_MASK) 501 502 #define NETC_ETH_IP_ISITABLE_KEYE_SRCPORTID_SHIFT (2U) 503 #define NETC_ETH_IP_ISITABLE_KEYE_SRCPORTID_MASK (0x0000007CUL) 504 #define NETC_ETH_IP_ISITABLE_KEYE_SRCPORTID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ISITABLE_KEYE_SRCPORTID_SHIFT)) & NETC_ETH_IP_ISITABLE_KEYE_SRCPORTID_MASK) 505 506 #define NETC_ETH_IP_ISITABLE_KEYE_SPM_SHIFT (7U) 507 #define NETC_ETH_IP_ISITABLE_KEYE_SPM_MASK (0x00000080UL) 508 #define NETC_ETH_IP_ISITABLE_KEYE_SPM(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ISITABLE_KEYE_SPM_SHIFT)) & NETC_ETH_IP_ISITABLE_KEYE_SPM_MASK) 509 510 511 512 typedef uint32 Netc_Eth_Ip_KeyTypeIdxType; 513 #define NETC_ETH_IP_ENETC_KEYTYPE_0 (0x00U) /* Enetc function, key construction is specified in ISIDKC0CR0 */ 514 #define NETC_ETH_IP_ENETC_KEYTYPE_1 (0x01U) /* Enetc function, key construction is specified in ISIDKC1CR0 */ 515 516 /*! 517 * @brief Stream Gate Instance Table Request Data Buffer ACFGEU (Admin Configuration Element Update.) field. 518 */ 519 #define NETC_ETH_IP_SGITABLE_REQFMT_ACFGEU_SHIFT (0U) 520 #define NETC_ETH_IP_SGITABLE_REQFMT_ACFGEU_MASK (0x00000001UL) 521 #define NETC_ETH_IP_SGITABLE_REQFMT_ACFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_REQFMT_ACFGEU_SHIFT)) & NETC_ETH_IP_SGITABLE_REQFMT_ACFGEU_MASK) 522 523 /*! 524 * @brief Stream Gate Instance Table Request Data Buffer CFGEU (Configuration Element Update) field. 525 */ 526 #define NETC_ETH_IP_SGITABLE_REQFMT_CFGEU_SHIFT (1U) 527 #define NETC_ETH_IP_SGITABLE_REQFMT_CFGEU_MASK (0x00000002UL) 528 #define NETC_ETH_IP_SGITABLE_REQFMT_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_REQFMT_CFGEU_SHIFT)) & NETC_ETH_IP_SGITABLE_REQFMT_CFGEU_MASK) 529 530 /*! 531 * @brief Stream Gate Instance Table Request Data Buffer SGISEU (Stream Gate Instance State Element Update) field. 532 */ 533 #define NETC_ETH_IP_SGITABLE_REQFMT_SGISEU_SHIFT (2U) 534 #define NETC_ETH_IP_SGITABLE_REQFMT_SGISEU_MASK (0x00000004UL) 535 #define NETC_ETH_IP_SGITABLE_REQFMT_SGISEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_REQFMT_SGISEU_SHIFT)) & NETC_ETH_IP_SGITABLE_REQFMT_SGISEU_MASK) 536 537 /*! 538 * @brief Stream Gate Instance Table CFGE_DATA config bits Format 539 */ 540 /* Octets Exceeded Enable */ 541 #define NETC_ETH_IP_SGITABLE_CFGE_OEXEN_SHIFT (0U) 542 #define NETC_ETH_IP_SGITABLE_CFGE_OEXEN_MASK (0x00000001UL) 543 #define NETC_ETH_IP_SGITABLE_CFGE_OEXEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_CFGE_OEXEN_SHIFT)) & NETC_ETH_IP_SGITABLE_CFGE_OEXEN_MASK) 544 545 /* Invalid Receive Enable */ 546 #define NETC_ETH_IP_SGITABLE_CFGE_IRXEN_SHIFT (1U) 547 #define NETC_ETH_IP_SGITABLE_CFGE_IRXEN_MASK (0x00000002UL) 548 #define NETC_ETH_IP_SGITABLE_CFGE_IRXEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_CFGE_IRXEN_SHIFT)) & NETC_ETH_IP_SGITABLE_CFGE_IRXEN_MASK) 549 550 /* Protocol/Service Data Unit */ 551 #define NETC_ETH_IP_SGITABLE_CFGE_SDUTYPE_SHIFT (2U) 552 #define NETC_ETH_IP_SGITABLE_CFGE_SDUTYPE_MASK (0x0000000CUL) 553 #define NETC_ETH_IP_SGITABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETH_IP_SGITABLE_CFGE_SDUTYPE_MASK) 554 555 /*! 556 * @brief Stream Gate Instance Table ICFGE_DATA config bits Format 557 */ 558 #define NETC_ETH_IP_SGITABLE_ICFGE_IPV_SHIFT (0U) 559 #define NETC_ETH_IP_SGITABLE_ICFGE_IPV_MASK (0x0000000FUL) 560 #define NETC_ETH_IP_SGITABLE_ICFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_ICFGE_IPV_SHIFT)) & NETC_ETH_IP_SGITABLE_ICFGE_IPV_MASK) 561 562 #define NETC_ETH_IP_SGITABLE_ICFGE_OIPV_SHIFT (4U) 563 #define NETC_ETH_IP_SGITABLE_ICFGE_OIPV_MASK (0x00000010UL) 564 #define NETC_ETH_IP_SGITABLE_ICFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_ICFGE_OIPV_SHIFT)) & NETC_ETH_IP_SGITABLE_ICFGE_OIPV_MASK) 565 566 /* Gate State */ 567 #define NETC_ETH_IP_SGITABLE_ICFGE_GST_SHIFT (5U) 568 #define NETC_ETH_IP_SGITABLE_ICFGE_GST_MASK (0x00000020UL) 569 #define NETC_ETH_IP_SGITABLE_ICFGE_GST(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_ICFGE_GST_SHIFT)) & NETC_ETH_IP_SGITABLE_ICFGE_GST_MASK) 570 571 /* Cut Through Disabled */ 572 #define NETC_ETH_IP_SGITABLE_ICFGE_CTD_SHIFT (6U) 573 #define NETC_ETH_IP_SGITABLE_ICFGE_CTD_MASK (0x00000040UL) 574 #define NETC_ETH_IP_SGITABLE_ICFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_ICFGE_CTD_SHIFT)) & NETC_ETH_IP_SGITABLE_ICFGE_CTD_MASK) 575 576 /*! 577 * @brief ICFGE_DATA Gate State data format enum type. 578 * This field specifies the gate state to use before the administrative stream gate control list takes affect. 579 */ 580 typedef uint32 Netc_Eth_Ip_SGITABLE_GateStateType; 581 #define NETC_ETH_IP_SGITABLE_GATE_CLOSE (0x0U) /*!< 0b = Closed; frames are not permitted to pass through. */ 582 #define NETC_ETH_IP_SGITABLE_GATE_OPEN (0x1U) /*!< 1b = Open; frames are permitted to pass through. */ 583 584 /*! 585 * @brief Stream Gate Instance Table SGISE_DATA config bits Format 586 */ 587 #define NETC_ETH_IP_SGITABLE_SGISE_OEX_SHIFT (0U) 588 #define NETC_ETH_IP_SGITABLE_SGISE_OEX_MASK (0x00000001UL) 589 #define NETC_ETH_IP_SGITABLE_SGISE_OEX(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_SGISE_OEX_SHIFT)) & NETC_ETH_IP_SGITABLE_SGISE_OEX_MASK) 590 591 #define NETC_ETH_IP_SGITABLE_SGISE_IRX_SHIFT (1U) 592 #define NETC_ETH_IP_SGITABLE_SGISE_IRX_MASK (0x00000002UL) 593 #define NETC_ETH_IP_SGITABLE_SGISE_IRX(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_SGISE_IRX_SHIFT)) & NETC_ETH_IP_SGITABLE_SGISE_IRX_MASK) 594 595 #define NETC_ETH_IP_SGITABLE_SGISE_STATE_SHIFT (2U) 596 #define NETC_ETH_IP_SGITABLE_SGISE_STATE_MASK (0x0000001CUL) 597 #define NETC_ETH_IP_SGITABLE_SGISE_STATE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGITABLE_SGISE_STATE_SHIFT)) & NETC_ETH_IP_SGITABLE_SGISE_STATE_MASK) 598 599 /*! 600 * @brief Stream Gate Control List Table CFGE_DATA config bits Format 601 */ 602 #define NETC_ETH_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT (0U) 603 #define NETC_ETH_IP_SGCLTABLE_CFGE_LISTLEN_MASK (0x000000FFUL) 604 #define NETC_ETH_IP_SGCLTABLE_CFGE_LISTLEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_LISTLEN_MASK) 605 606 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT (16U) 607 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTOIPV_MASK (0x00010000UL) 608 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTOIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_EXTOIPV_MASK) 609 610 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT (17U) 611 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTIPV_MASK (0x001E0000UL) 612 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_EXTIPV_MASK) 613 614 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT (21U) 615 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTCTD_MASK (0x00200000UL) 616 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTCTD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_EXTCTD_MASK) 617 618 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT (22U) 619 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTGTST_MASK (0x00400000UL) 620 #define NETC_ETH_IP_SGCLTABLE_CFGE_EXTGTST(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_EXTGTST_MASK) 621 622 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOM_SHIFT (0U) 623 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOM_MASK (0x00FFFFFFUL) 624 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOM(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_IOM_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_IOM_MASK) 625 626 #define NETC_ETH_IP_SGCLTABLE_CFGE_IPV_SHIFT (24U) 627 #define NETC_ETH_IP_SGCLTABLE_CFGE_IPV_MASK (0x0F000000UL) 628 #define NETC_ETH_IP_SGCLTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_IPV_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_IPV_MASK) 629 630 #define NETC_ETH_IP_SGCLTABLE_CFGE_OIPV_SHIFT (28U) 631 #define NETC_ETH_IP_SGCLTABLE_CFGE_OIPV_MASK (0x10000000UL) 632 #define NETC_ETH_IP_SGCLTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_OIPV_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_OIPV_MASK) 633 634 #define NETC_ETH_IP_SGCLTABLE_CFGE_CTD_SHIFT (29U) 635 #define NETC_ETH_IP_SGCLTABLE_CFGE_CTD_MASK (0x20000000UL) 636 #define NETC_ETH_IP_SGCLTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_CTD_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_CTD_MASK) 637 638 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOMEN_SHIFT (30U) 639 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOMEN_MASK (0x40000000UL) 640 #define NETC_ETH_IP_SGCLTABLE_CFGE_IOMEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_IOMEN_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_IOMEN_MASK) 641 642 #define NETC_ETH_IP_SGCLTABLE_CFGE_GTST_SHIFT (31U) 643 #define NETC_ETH_IP_SGCLTABLE_CFGE_GTST_MASK (0x80000000UL) 644 #define NETC_ETH_IP_SGCLTABLE_CFGE_GTST(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_CFGE_GTST_SHIFT)) & NETC_ETH_IP_SGCLTABLE_CFGE_GTST_MASK) 645 646 /*! 647 * @brief Stream Gate Control List Table SGCLSE_DATA format enum type. 648 * This field indicates whether or not a stream gate control list (SGCL) is in-use in a Stream Gate Instance (SGI). 649 */ 650 typedef uint32 Netc_Eth_Ip_SGCLTABLE_RefCountType; 651 #define NETC_ETH_IP_SGCLTABLE_NOT_INUSE_BYSGI (0x00U) /*!< Not in-use by an SGI. */ 652 #define NETC_ETH_IP_SGCLTABLE_INUSE_BYSGI (0x01U) /*!< In-use by an SGI. */ 653 #define NETC_ETH_IP_SGCLTABLE_REFCOUNT_RESERVED (0x02U) /*!< others reserved. */ 654 655 /*! 656 * @brief Stream Gate Control List Table SGCLSE_DATA Format*/ 657 #define NETC_ETH_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT (0U) 658 #define NETC_ETH_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK (0x000000FFUL) 659 #define NETC_ETH_IP_SGCLTABLE_SGCLSE_REFCOUNT(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT)) & NETC_ETH_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK) 660 661 /*! 662 * @brief Ingress Stream Table CFGE_DATA config bits Format 663 */ 664 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT (0U) 665 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK (0x00000001UL) 666 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SFE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK) 667 668 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT (4U) 669 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK (0x000000F0UL) 670 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK) 671 672 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT (8U) 673 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK (0x00000100UL) 674 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK) 675 676 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT (9U) 677 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK (0x00000600UL) 678 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_DR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK) 679 680 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT (11U) 681 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK (0x00000800UL) 682 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK) 683 684 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT (12U) 685 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK (0x00001000UL) 686 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK) 687 688 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT (13U) 689 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK (0x00002000UL) 690 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK) 691 692 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT (15U) 693 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK (0x00008000UL) 694 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SPPD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK) 695 696 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT (16U) 697 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK (0x00030000UL) 698 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ISQA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK) 699 700 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT (18U) 701 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK (0x00040000UL) 702 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ORP(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK) 703 704 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT (19U) 705 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK (0x00080000UL) 706 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OSGI(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK) 707 708 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT (20U) 709 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK (0x00F00000UL) 710 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_HR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK) 711 712 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT (24U) 713 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK (0x07000000UL) 714 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_FA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK) 715 716 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT (27U) 717 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK (0x18000000UL) 718 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK) 719 720 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT (0U) 721 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK (0x0000FFFFUL) 722 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_MSDU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK) 723 724 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT (16U) 725 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK (0x007F0000UL) 726 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK) 727 728 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT (23U) 729 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK (0x0F800000UL) 730 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK) 731 732 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT (28U) 733 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK (0x30000000UL) 734 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK) 735 736 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT (30U) 737 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK (0xC0000000UL) 738 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK) 739 740 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT (0U) 741 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK (0x00FFFFFFUL) 742 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK) 743 744 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT (0U) 745 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK (0x0000FFFFUL) 746 #define NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SIMAP(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT)) & NETC_ETH_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK) 747 748 749 750 /*! 751 * @brief Receive Flow Steering Entry definitions. 752 */ 753 #define NETC_ETH_IP_RFS_ENTRY_MODE_FIELD_SHIFT (16U) 754 #define NETC_ETH_IP_RFS_ENTRY_EN_FIELD_SHIFT (31U) 755 #define NETC_ETH_IP_RFS_ENTRY_L4PROTMASK_FIELD_SHIFT (8U) 756 #define NETC_ETH_IP_RFS_ENTRY_IPPRESENT_FIELD_SHIFT (18U) 757 #define NETC_ETH_IP_RFS_ENTRY_IPPRESENTMASK_FIELD_SHIFT (19U) 758 #define NETC_ETH_IP_RFS_ENTRY_L4PROTPRESENT_FIELD_SHIFT (20U) 759 #define NETC_ETH_IP_RFS_ENTRY_L4PROTPRESENTMASK_FIELD_SHIFT (21U) 760 #define NETC_ETH_IP_RFS_ENTRY_TCPUDPPRESENT_FIELD_SHIFT (22U) 761 #define NETC_ETH_IP_RFS_ENTRY_TCPUDPPRESENTMASK_FIELD_SHIFT (23U) 762 #define NETC_ETH_IP_RFS_ENTRY_IPV4IPV6_FIELD_SHIFT (24U) 763 #define NETC_ETH_IP_RFS_ENTRY_IPV4IPV6MASK_FIELD_SHIFT (25U) 764 #define NETC_ETH_IP_RFS_ENTRY_UDPTCP_FIELD_SHIFT (26U) 765 #define NETC_ETH_IP_RFS_ENTRY_UDPTCPMASK_FIELD_SHIFT (27U) 766 #define NETC_ETH_IP_RFS_ENTRY_L4DESTPORTMASK_FIELD_SHIFT (16U) 767 #define NETC_ETH_IP_RFS_ENTRY_L4SRCPORTMASK_FIELD_SHIFT (16U) 768 769 #define NETC_ETH_IP_64BYTE_TO_FIRST_WORD(x) ((x) & 0x00000000FFFFFFFFULL) 770 #define NETC_ETH_IP_64BYTE_TO_SECOND_WORD(x) (((x) & 0xFFFFFFFF00000000ULL) >> 32U) 771 772 /*! @brief Custom Rx Tag definitions */ 773 774 /* Position of tag's first byte in a frame */ 775 #define NETC_ETH_IP_RX_CUSTOM_TAG_START_BYTE (12U) 776 #define NETC_ETH_IP_RX_CUSTOM_TAG_NUM_BYTES (6U) 777 778 /* Type Field */ 779 #define NETC_ETH_IP_RX_CUSTOM_TAG_TYPE_SHIFT (4U) 780 #define NETC_ETH_IP_RX_CUSTOM_TAG_TYPE_MASK (0xF0U) 781 #define NETC_ETH_IP_RX_CUSTOM_TAG_TYPE(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_TYPE_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_TYPE_MASK) 782 783 /* Subtype Field */ 784 #define NETC_ETH_IP_RX_CUSTOM_TAG_SUBTYPE_SHIFT (0U) 785 #define NETC_ETH_IP_RX_CUSTOM_TAG_SUBTYPE_MASK (0x0FU) 786 #define NETC_ETH_IP_RX_CUSTOM_TAG_SUBTYPE(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_SUBTYPE_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_SUBTYPE_MASK) 787 788 /* Drop Resilience Field*/ 789 #define NETC_ETH_IP_RX_CUSTOM_TAG_DR_SHIFT (6U) 790 #define NETC_ETH_IP_RX_CUSTOM_TAG_DR_MASK (0xC0U) 791 #define NETC_ETH_IP_RX_CUSTOM_TAG_DR(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_DR_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_DR_MASK) 792 793 /* Internal Priority Value Field */ 794 #define NETC_ETH_IP_RX_CUSTOM_TAG_IPV_SHIFT (2U) 795 #define NETC_ETH_IP_RX_CUSTOM_TAG_IPV_MASK (0x3CU) 796 #define NETC_ETH_IP_RX_CUSTOM_TAG_IPV(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_IPV_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_IPV_MASK) 797 798 /* Source Port Field */ 799 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCPORT_SHIFT (3U) 800 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCPORT_MASK (0xF1U) 801 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCPORT(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_SRCPORT_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_SRCPORT_MASK) 802 803 /* Source Switch Field */ 804 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCSWITCH_SHIFT (0U) 805 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCSWITCH_MASK (0x07U) 806 #define NETC_ETH_IP_RX_CUSTOM_TAG_SRCSWITCH(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_SRCSWITCH_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_SRCSWITCH_MASK) 807 808 /* Host Reason Field */ 809 #define NETC_ETH_IP_RX_CUSTOM_TAG_HOSTREASON_SHIFT (4U) 810 #define NETC_ETH_IP_RX_CUSTOM_TAG_HOSTREASON_MASK (0xF0U) 811 #define NETC_ETH_IP_RX_CUSTOM_TAG_HOSTREASON(x) (((uint8)(((uint8)(x)) << NETC_ETH_IP_RX_CUSTOM_TAG_HOSTREASON_SHIFT)) & NETC_ETH_IP_RX_CUSTOM_TAG_HOSTREASON_MASK) 812 813 /*! 814 * @brief VSI to PSI messaging definitions. 815 */ 816 #if defined(ERR_IPV_NETC_051247) 817 #if (STD_ON == ERR_IPV_NETC_051247) 818 /* Data field position used to store the CRC byte obtained by removing 1 for Class field, 1 for Command field and 1 because of indexing starting with 0 */ 819 #define NETC_ETH_IP_VSI_MSG_CRC_POS (((uint8)(sizeof(Netc_Eth_Ip_VsiToPsiMsgType)) * (uint8)NETC_ETH_IP_VSITOPSI_MSG_SIZE) - (uint8) (3U)) 820 /* Standard 8-bit polynomial used in embedded networks */ 821 #define NETC_ETH_IP_VSI_MSG_POLYNOMIAL (0x97) 822 823 #endif 824 #endif 825 826 827 /*================================================================================================== 828 * ENUMS 829 ==================================================================================================*/ 830 /** @brief Controller power state indication. 831 * implements Netc_Eth_Ip_PowerStateType_enum */ 832 typedef enum 833 { 834 NETC_ETH_STATE_INACTIVE = 0U, /*!< Controller is powered on and Transmitter/Receiver are disabled */ 835 NETC_ETH_STATE_ACTIVE = 1U /*!< Controller is powered on and Transmitter/Receiver are enabled */ 836 } Netc_Eth_Ip_PowerStateType; 837 838 /** @brief Type of the SI. */ 839 typedef enum 840 { 841 NETC_ETH_IP_PHYSICAL_SI = 0U, /*!< Phyisical SI. */ 842 NETC_ETH_IP_VIRTUAL_SI = 1U /*!< Virtual SI. */ 843 } Netc_Eth_Ip_StationInterfaceType; 844 845 /** @brief Ingress congestion management priority. Used for congestion management. 846 * TODO: Not in use. 847 */ 848 typedef enum 849 { 850 ICM_LOW_PRIORITY = 0U, /*!< ICM low priority */ 851 ICM_HIGH_PRIORITY = 1U /*!< ICM high priority */ 852 } Netc_Eth_Ip_ICMType; 853 854 /** @brief Return values. 855 * implements Netc_Eth_Ip_StatusType_enum */ 856 typedef enum 857 { 858 /* Generic error codes */ 859 NETC_ETH_IP_STATUS_SUCCESS = 0x000U, /*!< Generic operation success status */ 860 NETC_ETH_IP_STATUS_ERROR = 0x001U, /*!< Generic operation failure status */ 861 NETC_ETH_IP_STATUS_TIMEOUT = 0x003U, /*!< Generic operation timeout status */ 862 NETC_ETH_IP_STATUS_UNSUPPORTED = 0x004U, /*!< Generic operation unsupported status. */ 863 NETC_ETH_IP_STATUS_MAC_ADDR_NOT_FOUND = 0x005U, /*!< The current searched MAC address is not used. */ 864 NETC_ETH_IP_STATUS_MAC_ADDR_TABLE_FULL = 0x006U, /*!< Table of MAC address is full. */ 865 NETC_ETH_IP_STATUS_DELETE_MAC_ADDR = 0x007U, /*!< MAC address was removed with success. */ 866 NETC_ETH_IP_CBDRSTATUS_RINGFULL = 0x008U, /*!< Ring is full */ 867 NETC_ETH_CBDRSTATUS_ACCESSMETHOD_ERROR = 0x009U, /*!< Access method error (does not support) */ 868 NETC_ETH_IP_STATUS_HOSTREASON_UNKNOWN = 0x100U, 869 NETC_ETH_IP_STATUS_HOSTREASON_TIMESTAMP = 0x101U, 870 871 /*PSI user defined message codes */ 872 NETC_ETH_IP_PSITOVSI_CMD_SUCCESFUL = 0x8000U, /*!< PSI sent positive response, VSI command executed succesful */ 873 NETC_ETH_IP_PSITOVSI_PERMISSION_DENIED = 0x8001U, /*!< PSI sent negative response - permission denied */ 874 NETC_ETH_IP_PSITOVSI_SYNC_STATUS_TRUE = 0x8002U, /*!< PSI sent affirmative response to sync status request */ 875 NETC_ETH_IP_PSITOVSI_SYNC_STATUS_FALSE = 0x8003U, /*!< PSI sent negative response to sync status request */ 876 NETC_ETH_IP_PSITOVSI_MSG_INTEGRITY_ERROR = 0x8004U, /*!< PSI received erronous data */ 877 878 NETC_ETH_IP_STATUS_TX_MANAGEMENT_BUFF_BUSY = 0x904U, /*!< All internal TX buffers are currently in use */ 879 /* Specific error codes */ 880 NETC_ETH_IP_STATUS_RX_QUEUE_EMPTY = 0xA01U, /*!< There is no available frame in the receive queue */ 881 NETC_ETH_IP_STATUS_TX_QUEUE_FULL = 0xA02U, /*!< There is no available space for the frame in the transmit queue */ 882 NETC_ETH_IP_STATUS_BUFF_NOT_FOUND = 0xA03U, /*!< The specified buffer was not found in the queue */ 883 NETC_ETH_IP_STATUS_TX_BUFF_BUSY = 0xA04U, /*!< All internal TX buffers are currently in use */ 884 NETC_ETH_IP_STATUS_TX_BUFF_OVERFLOW = 0xA05U, /*!< The requested TX buffer length is not supported. */ 885 NETC_ETH_IP_STATUS_INVALID_FRAME_LENGTH = 0xA06U, /*!< The length of the frame should be minimum 16 bytes. */ 886 #if(NETC_ETH_IP_HAS_CACHE_MANAGEMENT == STD_ON) 887 NETC_ETH_IP_STATUS_CACHE_ERROR = 0xA07U, /*!< Cache operation failed. */ 888 #endif 889 NETC_ETH_IP_STATUS_NOT_REAL_ERROR = 0x8AU, /*!< Error code 0x8A is not a real error. This need to be cover errata */ 890 891 /* Time scheduling table error code*/ 892 NETC_ETH_CBDRSTATUS_UPTATE_EXISTING_ADMIN_GATE_CONTROL = 0x0D1U, /* Update action attempted on an existing admin gate control. An existing admin gate control list cannot be modified, Delete admin gate control list first before creating a new admin list. (Use update action with ADMIN_CONTROL_LIST_LENGTH =0 to perform delete). */ 893 NETC_ETH_CBDRSTATUS_UPDATE_ACTION_EXCEED_MAX_GCL_LEN = 0x0D2U, /* Update action attempted exceeds TGSTCAPR[MAX_GCL_LEN]. */ 894 NETC_ETH_CBDRSTATUS_UPDATE_ACTION_EXCEED_NUM_WORDS = 0x0D3U, /* Update action attempted exceeds TGSTCAPR[NUM_WORDS]. */ 895 NETC_ETH_CBDRSTATUS_INSUFFICIENT_RESOURCES = 0x0D4U, /* Insufficient resources to perform the requested operation (not enough free time gate list entries) */ 896 NETC_ETH_CBDRSTATUS_TRANSMITTING_TIME_NOT_SUFFICIENT = 0x0D5U, /* Update action attempted with ADMIN_CYCLE_TIME, ADMIN_TIME_INTERVAL_GE_i or truncated ADMIN_TIME_INTERVAL_GE_n due ADMIN_CYCLE_TIME specified is not sufficient to transmit 64 byte of frame data + header overhead. Where header overhead = PTXSDUOR[PTXSDUOR] + PTXSDUOR[PPDU_BCO]. */ 897 NETC_ETH_CBDRSTATUS_ADMIN_BASE_TIME_IS_MORE_THAN_1S = 0x0D6U, /* Update action attempted with ADMIN_BASE_TIME specified is more than one second in the past from tcs advance time. */ 898 NETC_ETH_CBDRSTATUS_ADMIN_CYCLE_TIME_OVERFLOW = 0x0D7U, /* Update action attempted with ADMIN_CYCLE_TIME + ADMIN_CYCLE_TIME_EXT is greater than 2^32-1. */ 899 NETC_ETH_CBDRSTATUS_RETRY_QUERY = 0x0D8U, /* Query action issued when config change occurred. Retry query. */ 900 NETC_ETH_CBDRSTATUS_INVALID_ADMIN_HR_CB_GE = 0x0D9U /* Update action attempted with ADMIN_HR_CB_GE_i set to an invalid value. */ 901 } Netc_Eth_Ip_StatusType; 902 903 /** @brief Counters supported by ENETC. 904 * implements Netc_Eth_Ip_CounterType_enum */ 905 typedef enum 906 { 907 NETC_ETH_IP_SIROCT = 0x300U, /*!< Station interface receive octets counter(ifInOctets). All bytes received (without frame errors) by the SI except preamble, 908 SFD and CRC (if the CRC has been removed from the frame by the MAC). */ 909 NETC_ETH_IP_SIRFRM = 0x308U, /*!< Station interface receive frame counter (aFrameReceivedOK). Number of frames received by the SI without errors. */ 910 NETC_ETH_IP_SIRUCA = 0x310U, /*!< Station interface receive unicast frame counter (ifInUcastPkts). Number of unicast frames received by the SI without errors. */ 911 NETC_ETH_IP_SIRMCA = 0x318U, /*!< Station interface receive multicast frame counter (ifInMulticastPkts). Number of multicast frames received by the SI without errors. */ 912 NETC_ETH_IP_SITOCT = 0x320U, /*!< Station interface transmit octets counter (ifOutOctets). All bytes transmitted (without errors) by the SI except preamble, 913 SFD and CRC (if CRC has been appended to the frame by the MAC). */ 914 NETC_ETH_IP_SITFRM = 0x328U, /*!< Station interface transmit frame counter (aFrameTransmittedOK). Number of frames transmitted by the SI without errors with the exception 915 of frames with error (BD status code point) 0x020 (frame dropped due to port reset) or 0x0A0 (multi-bit ECC error), which will be counted in this counter.*/ 916 NETC_ETH_IP_SITUCA = 0x330U, /*!< Station interface transmit unicast frame counter (ifOutUcastPkts). Number of unicast frames transmitted by the SI without errors. */ 917 NETC_ETH_IP_SITMCA = 0x338U, /*!< Station interface transmit multicast frame counter (ifOutMulticastPkts). Number of multicast frames transmitted by the SI without errors. */ 918 } Netc_Eth_Ip_CounterType; 919 920 /** @brief VLAN Protocol Identifier, which can be inserted in transmission and are acceptable for VLAN removal in reception. 921 * implements Netc_Eth_Ip_VlanProtocolIdentifierType_enum 922 */ 923 typedef enum 924 { 925 NETC_ETH_IP_STANDARD_CVLAN = 0x00U, /*!< Standard C-VLAN 0x8100 */ 926 NETC_ETH_IP_STANDARD_SVLAN = 0x01U, /*!< Standard S-VLAN 0x88A8 */ 927 NETC_ETH_IP_CUSTOM_VLAN1 = 0x02U, /*!< Custom VLAN as defined by CVLANR1[ETYPE] */ 928 NETC_ETH_IP_CUSTOM_VLAN2 = 0x03U /*!< Custom VLAN as defined by CVLANR2[ETYPE] */ 929 } Netc_Eth_Ip_VlanProtocolIdentifierType; 930 931 /** @brief Error type returned when transmit status is unsuccessfully. 932 * implements Netc_Eth_Ip_TxStatusType_enum */ 933 typedef enum 934 { 935 NETC_ETH_TX_NO_ERR = 0x000U, /*!< No error detected after transmit. */ 936 NETC_ETH_TX_PROGRM_ERR = 0x001U, /*!< An error exists in either the Tx BD, the Tx ring registers, or some combination of these. */ 937 NETC_ETH_TX_TSDD = 0x002U, /*!< TSDD - Time specific departure drop. */ 938 NETC_ETH_TX_FRAME_SIZE_ERROR = 0x008U, /*!< Frame size error - consult the RM to get all possibilities. */ 939 NETC_ETH_TX_NULL_ADDR = 0x009U, /*!< Null address */ 940 NETC_ETH_TX_INVALID_FBC_LENGTH = 0x00AU, /*!< Invalid frame/buffer/chain length */ 941 NETC_ETH_TX_MAC_SPOOFING = 0x010U, /*!< Source MAC address spoofing detected */ 942 NETC_ETH_TX_FRM_DROP_PORT_RESET = 0x020U, /*!< Frame dropped due to port reset. */ 943 NETC_ETH_TX_FRM_DROP_PORT_DISABLE = 0x021U, /*!< Frame dropped due to port disabled. */ 944 NETC_ETH_TX_VLAN_TPID_NOTALLOWED = 0x040U, /*!< VLAN TPID not allowed. */ 945 NETC_ETH_TX_PROGRM_ERR_IN_BDR = 0x060U, /*!< Programming error in buffer descriptor used for direct switch enqueue */ 946 NETC_ETH_TX_FRM_TOO_LARGE = 0x080U, /*!< Frame too large for time gating window. */ 947 NETC_ETH_TX_AXI_READ_ERR = 0x090U, /*!< Frame not transmitted (dropped) due to an AXI read error detected. */ 948 NETC_ETH_TX_AXI_WRITE_ERR = 0x091U, /*!< Frame not transmitted (dropped) due to an AXI write error detected. */ 949 NETC_ETH_TX_MULTIBIT_ECC_ERR = 0x0A0U, /*!< Frame not transmitted (dropped) due to a multi-bit ECC error detected. */ 950 NETC_ETH_TX_PARITY_ERR = 0x0F0U, /*!< Frame not transmitted (dropped) due to a parity write error detected. */ 951 NETC_ETH_TX_FRM_DROP_SW_CONGESTION = 0x100U, /*!< Frame dropped due to switch congestion */ 952 NETC_ETH_TX_NOT_SENT = 0xFFFU /*!< Frame not transmitted yet */ 953 } Netc_Eth_Ip_TxStatusType; 954 955 /** @brief Low-level Tx management object status. */ 956 typedef enum 957 { 958 NETC_ETH_IP_TX_MGMT_FREE = 0x00U, /*!< Object is unused. */ 959 NETC_ETH_IP_TX_MGMT_PREPARED = 0x02U, /*!< Object is associated to a management frame ready to be sent. */ 960 NETC_ETH_IP_TX_MGMT_PREPARED_TIMESTAMP = 0x03U, /*!< Object is associated to a timestamp management frame ready to be sent. */ 961 NETC_ETH_IP_TX_MGMT_QUEUED = 0x04U, /*!< Associated management frame is queued, pending confirmation. */ 962 NETC_ETH_IP_TX_MGMT_QUEUED_TIMESTAMP = 0x05U, /*!< Associated timestamp frame is queued, pending confirmation. */ 963 NETC_ETH_IP_TX_MGMT_WAITING_TIMESTAMP = 0x09U, /*!< Object is associated to a sent frame (confirmed) waiting for a timestamp reply. */ 964 NETC_ETH_IP_TX_MGMT_READY = 0x10U /*!< Associated frame is fully processed and the object is ready to use by higher levels. */ 965 }Netc_Eth_Ip_TxManagementStateType; 966 967 /** @brief Error type returned when receive status is unsuccessfully. 968 * implements Netc_Eth_Ip_RxStatusType_enum */ 969 typedef enum 970 { 971 NETC_ETH_RX_NO_RECEIVE_ERR = 0x00U, /*!< No error detected. */ 972 NETC_ETH_RX_FRM_CRC_FAIL = 0x20U, /*!< Frame CRC (FCS) validation failed. */ 973 NETC_ETH_RX_L3_CKSUM_FAIL = 0x40U, /*!< L3 (IPv4) Header Checksum validation failed. */ 974 NETC_ETH_RX_L4_CKSUM_FAIL = 0x41U, /*!< L4 (TCP or UDP) Checksum validation failed. */ 975 NETC_ETH_RX_LGCPARITY_SRAM_MISMATCH = 0x80U, /*!< Internal logic parity or SRAM (ECC) mismatch detected. */ 976 NETC_ETH_RX_SYSBUS_READ_ERR = 0x88U, /*!< System Bus Read Error detected during processing of the frame. */ 977 NETC_ETH_RX_SYSBUS_WRITE_ERR = 0x89U /*!< System Bus Write Error detected during processing of the frame. */ 978 } Netc_Eth_Ip_RxStatusType; 979 980 /** @brief Shall represent the host reason for a received frame. 981 * Valid only in the first descriptor of a chain. 982 * implements Netc_Eth_Ip_HostReasonType_enum */ 983 typedef enum 984 { 985 NETC_ETH_IP_REGULAR_FRAME = 0U, /* Regular forwarded frame */ 986 NETC_ETH_IP_INGRESS_MIRRORING = 1U, /* Ingress mirroring */ 987 NETC_ETH_IP_MAC_LEARNING = 2U, /* MAC learning */ 988 NETC_ETH_IP_TIMESTAMP_RESPONSE = 3U, /* Timestamp Response */ 989 NETC_ETH_IP_SW_DEFINED_HOST_REASON = 8U /* Software defined Host Reason */ 990 } Netc_Eth_Ip_HostReasonType; 991 992 /** @brief This flag will indicate the presence of what additional fields in TX descriptor. 993 * Valid only in the first descriptor of a chain. 994 */ 995 typedef enum 996 { 997 NETC_ETH_IP_SWT_MANAGEMNT = 0x00U, /*!< Switch management optional fields are present. */ 998 NETC_ETH_IP_RESERVED_FLAG = 0x01U, /*!< Reserved value of the flag field. */ 999 NETC_ETH_IP_TXSTART = 0x02U /*!< TX_START field is present in the descriptor. */ 1000 } Netc_Eth_Ip_TxOptionsFlagType; 1001 1002 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1003 /** @brief This flag will indicate what offloads are enabled in the TX descriptor. 1004 */ 1005 typedef enum 1006 { 1007 NETC_ETH_IP_E_FLAGS_NONE = 0U, /* No extension flags */ 1008 NETC_ETH_IP_E_FLAGS_VLAN_INSERT = 1U, /* VLAN Insert offload */ 1009 NETC_ETH_IP_E_FLAGS_ONE_STEP_TIMESTAMP = 2U, /* IEEE 1588 PTP one-step timestamp offload */ 1010 NETC_ETH_IP_E_FLAGS_TWO_STEP_TIMESTAMP = 4U /* IEEE 1588 PTP two-step timestamp offload */ 1011 }Netc_Eth_Ip_TxOptionsExtensionFlagType; 1012 #endif 1013 1014 /** 1015 * @brief Action type which can be done through VSI to PSI messaging. 1016 * 0x1234 -> first byte(12) - CLASS 1017 * -> second byte(32) - COMMAND 1018 * @internal 1019 */ 1020 typedef enum 1021 { 1022 NETC_ETH_IP_VSITOPSI_MAC_ADDR_SET = 0x0000U, /*!< VSI sent a set MAC command. */ 1023 NETC_ETH_IP_VSITOPSI_ADD_RX_MAC_ADDR_FILTER = 0x0100U, /*!< VSI sent an add filter for a MAC command. */ 1024 NETC_ETH_IP_VSITOPSI_DELETE_RX_MAC_ADDR_FILTER = 0x0101U, /*!< VSI sent a delete filter MAC command. */ 1025 NETC_ETH_IP_VSITOPSI_ENABLE_MULTICAST = 0x1000U, /*!< VSI sent a request to enable multicast promiscuous mode. */ 1026 NETC_ETH_IP_VSITOPSI_DISABLE_MULTICAST = 0x1010U, /*!< VSI sent a request to disable multicast promiscuous mode. */ 1027 NETC_ETH_IP_VSITOPSI_CLOSE_FILTER = 0x1020U, /*!< VSI sent a request to stop all multicast traffic. */ 1028 NETC_ETH_IP_VSITOPSI_GET_SYNC_STATE = 0x2000U /*!< VSI sent a request for the synchronization state */ 1029 } Netc_Eth_Ip_VsiToPsiMsgActionType; 1030 1031 typedef enum { 1032 NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD = 0U, /*!< first uint32 item of Enetc Tables Request Data Buffer Format */ 1033 NETC_ETH_IP_ENETCTABLE_REQFMT_ENTRYID_FIELD, /*!< second uint32 item of Enetc Tables Request Data Buffer Format when ACCESS_METHOD = 0x0 (ENTRY_ID Match) */ 1034 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA0, /*!< first item of CFGEDATA but third item of Enetc Tables Request Data Buffer Format */ 1035 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA1, /*!< second item of CFGEDATA but forth item of Enetc Tables Request Data Buffer Format */ 1036 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA2, /*!< third item of CFGEDATA but fifth item of Enetc Tables Request Data Buffer Format */ 1037 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA3, /*!< forth item of CFGEDATA but sixth item of Enetc Tables Request Data Buffer Format */ 1038 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but seventh item of Enetc Tables Request Data Buffer Format */ 1039 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA5, /*!< sixth item of CFGEDATA but eighth item of Enetc Tables Request Data Buffer Format */ 1040 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA6, /*!< seventh item of CFGEDATA but ninth item of Enetc Tables Request Data Buffer Format */ 1041 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA7, 1042 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA8, 1043 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA9 1044 } Netc_Eth_Ip_EnetcTableRequestDataIndexType; 1045 1046 /*! 1047 * @brief Query action enum types for tables in Enetc. 1048 */ 1049 typedef enum { 1050 NETC_ETH_TABLES_FULL_QUERY = 0x0U, /*!< Full Query */ 1051 NETC_ETH_TABLES_ENTRY_ID_QUERY = 0x1U /*!< Entry_Id query only */ 1052 } Netc_Eth_Ip_TablesQueryActionType; 1053 1054 /*! 1055 * @brief defines access method type. 1056 */ 1057 typedef enum { 1058 NETC_ETH_ENTRY_ID_MATCH = 0x0U, /*!< if entry id match */ 1059 NETC_ETH_EXACT_MATCH_KEY_ELEMENT_MATCH, /*!< if exact match key element match */ 1060 NETC_ETH_SEARCH_METHOD, /*!< search method */ 1061 NETC_ETH_TERNARY_MATCH_KEY_ELEMENT_MATCH /*!< if ternary match key element */ 1062 } Netc_Eth_Ip_AccessMethodType; 1063 1064 /*! 1065 * @brief defines commands type. 1066 * 1067 */ 1068 typedef enum { 1069 NETC_ETH_DELETE_CMD = 0x1U, /*!< delete command */ 1070 NETC_ETH_UPDATE_CMD = 0x2U, /*!< update command */ 1071 NETC_ETH_QUERY_CMD = 0x4U, /*!< query command*/ 1072 NETC_ETH_QUERY_FOLLOWEDBY_DELETE_CMD = 0x5U, /*!< query followed by delete command */ 1073 NETC_ETH_QUERY_FOLLOWEDBY_UPDATE_CMD = 0x6U, /*!< query followed by update command */ 1074 NETC_ETH_ADD_CMD = 0x8U, /*!< add a command */ 1075 NETC_ETH_ADD_OR_UPDATE_CMD = 0xAU, /*!< add or update a command */ 1076 NETC_ETH_ADD_FOLLOWEDBY_QUERY_CMD = 0xCU, /*!< add followed by query command */ 1077 NETC_ETH_ADD_FOLLOWEDBY_QUERY_FOLLOWEDBY_UPDATE_CMD = 0xEU /*!< add followed by query followed by update command */ 1078 } Netc_Eth_Ip_CommandsType; 1079 1080 /*! 1081 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 1082 */ 1083 typedef enum { 1084 NETC_ETH_IP_REQHEADER_ADDR_L = 0x0U, /*!< a 16-byte aligned low part of memory address for a table, offset: 0x0 */ 1085 NETC_ETH_IP_REQHEADER_ADDR_H = 0x1U, /*!< a 16-byte aligned high part of memory address for a table, offset: 0x1 */ 1086 NETC_ETH_IP_REQHEADER_LENGTHFIELD = 0x2U, /*!< request and response buffer length in Request Header, offset: 0x2 */ 1087 NETC_ETH_IP_REQHEADER_CONFIGFIELD = 0x3U, /*!< config field includes Table id, access method, command etc. in Request Header, offset: 0x3 */ 1088 NETC_ETH_IP_REQHEADER_NPFFIELD = 0x7U /*!< NPF field in Request Header, offsext: 0x7 */ 1089 } Netc_Eth_Ip_NTMPReqHeaderFormatIndexType; 1090 1091 /*! 1092 * @brief NTMP1 command descriptor format index enum for buffer descriptors of command rings. 1093 */ 1094 typedef enum { 1095 NETC_ETH_IP_CBD_ADDR_L = 0x00U, 1096 NETC_ETH_IP_CBD_ADDR_H = 0x01U, 1097 NETC_ETH_IP_CBD_DATA_1 = 0x02U, 1098 NETC_ETH_IP_CBD_DATA_2 = 0x03U, 1099 NETC_ETH_IP_CBD_DATA_3 = 0x04U, 1100 NETC_ETH_IP_CBD_DATA_4 = 0x05U, 1101 NETC_ETH_IP_CBD_LENGTH_INDEX = 0x06U, 1102 NETC_ETH_IP_CBD_CMD = 0x07U 1103 } Netc_Eth_Ip_ReqHeaderNTMP1TableOperationDataType; 1104 1105 /*! 1106 * @brief enum type for administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry. 1107 * implements Netc_Eth_Ip_AdminGateOperationType_enum 1108 */ 1109 typedef enum { 1110 NETC_ETH_HOST_REQUEST_UNCHANGED, /*!< 0x0: SetGateStates. HoldRequest is unchanged. */ 1111 NETC_ETH_HOST_REQUEST_HOLD, /*!< 0x1: Set-And-Hold-MAC. HoldRequest is set to value hold (1). */ 1112 NETC_ETH_HOST_REQUEST_RELEASE /*!< 0x2: Set-And-Release-MAC. HoldRequest is set to value release (0). */ 1113 } Netc_Eth_Ip_AdminGateOperationType; 1114 1115 /*! 1116 * @brief enum type for Administrative Traffic Class Gate States. 1117 */ 1118 typedef enum { 1119 NETC_ETH_TRAFFIC_CLASS_GATE_CLOSED, /*!< 0x0: Gate closed. */ 1120 NETC_ETH_TRAFFIC_CLASS_GATE_OPEN /*!< 0x1: Gate open. */ 1121 } Netc_Eth_Ip_AdminTrafficClassGateStateType; 1122 1123 /*! 1124 * @brief Eth Rate policer Table Service Data Unit enum type. 1125 */ 1126 typedef enum 1127 { 1128 NETC_ETH_IP_PPDU = 0U, /*!< Physical Layer PDU */ 1129 NETC_ETH_IP_MPDU = 1U, /*!< MAC PDU */ 1130 NETC_ETH_IP_MSDU = 2U, /*!< MAC SDU */ 1131 NETC_ETH_IP_RSDTYPE = 3U /* reservered type */ 1132 }Netc_Eth_Ip_SDUType; 1133 1134 /*! 1135 * @brief Ingress Port Filter Table CFGE_DATA format enum type. Netc_Eth_Ip_IngressPortFilterTableCFGEDataIndexType 1136 */ 1137 typedef enum { 1138 NETC_ETH_IP_INGRESSPORTFILTER_CFGE_CONFIG_FIELD = 54U, /*!< CONFIG field includes IPV, DR, FLTFA etc in Ingress Port Filter Table CFGE_DATA Format */ 1139 NETC_ETH_IP_INGRESSPORTFILTER_CFGE_FLTATGT_FIELD = 55U /*!< FLTA_TGT (Target For Selected Filter Action) field in Ingress Port Filter Table CFGE_DATA Format */ 1140 } Netc_Eth_Ip_IngressPortFilterTableCFGEDataIndexType; 1141 1142 /*! 1143 * @brief enum type for Filter Forwarding Action field data type of IPF table. 1144 */ 1145 typedef enum { 1146 NETC_ETH_IPF_DISCARDFRAMES, /*!< 0x0: discard frames. */ 1147 NETC_ETH_IPF_PERMITFRAMES /*!< 0x1: permit frames. */ 1148 } Netc_Eth_Ip_IPFFilterForwardingActionDataType; 1149 1150 /*! 1151 * @brief enum type for Filter Action field data type of IPF table. 1152 */ 1153 typedef enum { 1154 NETC_ETH_IPF_NOACTION, /*!< 0x0: no actions. */ 1155 NETC_ETH_IPF_SENDTOSPECIFICSIS /*!< 0x1: sending to a specific SIs. */ 1156 } Netc_Eth_Ip_IPFFilterActionDataType; 1157 1158 /*================================================================================================== 1159 * STRUCTURES AND OTHER TYPEDEFS 1160 ==================================================================================================*/ 1161 /** @brief Callback function invoked when a general event is encountered. */ 1162 typedef void (*Netc_Eth_Ip_CallbackType)(uint8 Controller); 1163 1164 /** @brief Signature of the callback function invoked when a specific queue event is encountered */ 1165 typedef void (*Netc_Eth_Ip_ChCallbackType)(uint8 Controller, uint8 Ring); 1166 1167 /*! 1168 * @brief NTMP request and response message header format for buffer descriptors of command rings. 1169 */ 1170 typedef struct { 1171 uint32 MessageHeaderDataField[8U]; /*!< used for both request and response message header data format */ 1172 } Netc_Eth_Ip_NTMPMessageHeaderFormatType; 1173 1174 /*! 1175 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 1176 */ 1177 typedef struct { 1178 uint16 ReqBuffLength; /*!< Table Request data buffer length field of NTMP Request Message Header Data Format */ 1179 uint16 RspBuffLength; /*!< Table Response data buffer length field of NTMP Request Message Header Data Format */ 1180 uint8 CmdCompletionInt; /*!< CCI (Command Completion Interrupt) in config field of Request Message Header Data Format */ 1181 uint8 Version; /*!< Protocol Version in config field of Request Message Header Data Format */ 1182 uint8 TableId; /*!< TABLE_ID in config field of Request Message Header Data Format */ 1183 Netc_Eth_Ip_AccessMethodType AccessMethod; /*!< ACCESS_METHOD in config field of Request Message Header Data Format */ 1184 Netc_Eth_Ip_CommandsType Cmd; /*!< COMMAND in config field of Request Message Header Data Format */ 1185 } Netc_Eth_Ip_ReqHeaderTableOperationDataType; 1186 1187 /*! 1188 * @brief NTMP V1.0 entry set message header format index enum for buffer descriptors of command rings. 1189 */ 1190 typedef struct { 1191 uint32 Data0; /*!< */ 1192 uint32 Data1; /*!< */ 1193 uint16 SI_Bitmap; /*!< */ 1194 uint16 Index; /*!< */ 1195 uint16 Length; /*!< */ 1196 uint8 Format; /*!< */ 1197 uint8 Class; /*!< */ 1198 uint8 Command; /*!< */ 1199 } Netc_Eth_Ip_SetMessageHeaderTableOperationDataType; 1200 1201 1202 /** @brief Station interface command buffer description. */ 1203 typedef struct 1204 { 1205 Netc_Eth_Ip_NTMPMessageHeaderFormatType *commandBDAddr; /*!< Address where command buffer descriptor will be saved. The address must be 128 byte aligned. */ 1206 uint8 lengthCBDR; /*!< Number of command buffer descriptors ring. */ 1207 } Netc_Eth_Ip_CommandBDType; 1208 1209 1210 /** @brief Message configuration structure.Should be a multiple of 32 bytes. */ 1211 typedef struct 1212 { 1213 uint8 Class; /*!< Class of the command. */ 1214 uint8 Command; /*!< Type of command. */ 1215 uint8 Data[30U]; /*!< Data. */ 1216 } Netc_Eth_Ip_VsiToPsiMsgType; 1217 1218 /** @brief Transmit buffer descriptor. */ 1219 typedef struct 1220 { 1221 uint32 dataBuffAddr; /*!< Address where the data for transmit operation is stored. */ 1222 uint32 RESERVED_0; /*!< UNUSED! Only used for the system with address spaces on 64 bits. */ 1223 uint32 length; /*!< Length of data buffer(it will be in bytes). */ 1224 uint32 buffConfig; /*!< Buffer descriptor configuration for a normal descriptor. */ 1225 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1226 uint32 timestamp; /*!< Timestamp value used to update packet header field on transmission. */ 1227 uint32 extendVlanBuffConfig; /*!< VLAN specific configuration. */ 1228 const uint32 RESERVED_1; /*!< UNUSED! Not configured by hardware! */ 1229 uint32 extendBuffConfig; /*!< Buffer descriptor configuration for an extended descriptor. */ 1230 #endif 1231 } Netc_Eth_Ip_TxBDRType; 1232 1233 /** @brief Transmit buffer descriptor writeback. */ 1234 typedef struct 1235 { 1236 const uint32 Timestamp; /*!< Address where the data for transmit operation is stored. */ 1237 const uint16 TxTimestampID; /*!< UNUSED! Only used for the system with address spaces on 64 bits. */ 1238 const uint16 RESERVED_0; /*!< UNUSED! */ 1239 const uint32 RESERVED_1; /*!< UNUSED! */ 1240 const uint16 RESERVED_2; /*!< UNUSED! */ 1241 const uint16 FlagsAndStatus; /*!< Buffer descriptor configuration for a normal descriptor. */ 1242 } Netc_Eth_Ip_TxBDRWritebackType; 1243 1244 1245 /** @brief Transmit Timestamp Reference Response Buffer Descriptor Format. */ 1246 typedef struct 1247 { 1248 const uint32 Timestamp; /*!< Timestamp; synchronized timestamp or a free running timestamp */ 1249 const uint32 RESERVED_0; /*!< UNUSED! */ 1250 const uint16 TxTimestampID; /*!< Transmit Timestamp Identifier. */ 1251 const uint16 RESERVED_1; /*!< UNUSED! */ 1252 const uint16 HostReason; /*!< Host Reason 0: Regular forwarded frame 1253 1: Ingress mirroring 1254 2: MAC learning 1255 3: Timestamp Response 1256 4-7: Reserved 1257 8-15: Software defined Host Reason */ 1258 const uint16 FlagsAndErrorStat; /*!< Final flag + Ready flag + Error status code for the received frame. */ 1259 } Netc_Eth_Ip_TxTimestampResponseType; 1260 1261 /** 1262 * @brief Transmit internal buffer descriptor. 1263 * @details The fildes of this stucture are generic. 1264 * - at initialization the first 2 words are used to store the location in which the receive frame will be stored; 1265 * - after a frame is received information will be conform with the reference manual. 1266 */ 1267 typedef struct 1268 { 1269 uint32 configRxBD[4]; /*!< Generic configuration of a Rx BDR. */ 1270 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1271 uint32 extendConfigRxBD[4]; /*!< Extended generic configuration of a Rx BDR. */ 1272 #endif 1273 } Netc_Eth_Ip_RxBDRType; 1274 1275 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1276 /** 1277 * @brief VLAN specific configuration. 1278 */ 1279 typedef struct 1280 { 1281 Netc_Eth_Ip_VlanProtocolIdentifierType ProtocolIdentifier; /*! Tag protocol identifier. */ 1282 uint8 PriorityCodePoint; /*! Priority code. */ 1283 boolean DropIndicator; /*! Indicate frames eligible to be dropped in the presence of congestion. */ 1284 uint16 VlanIdentifier; /*! The VLAN identifier is a 12-bit field specifying the VLAN to which the frame belongs. */ 1285 } Netc_Eth_Ip_VlanType; 1286 #endif 1287 1288 /*! 1289 * @brief defines Gate Entry Admin Control List Data type for Time Gate Scheduling Table. 1290 * implements Netc_Eth_Ip_GateEntryAdminControlListDataType_structure 1291 */ 1292 typedef struct 1293 { 1294 uint32 AdminTimeInterval; /*!< Administrative Time Interval for Gate Entry */ 1295 uint8 AdminTrafficClassGateStates; /*!< Administrative Traffic Class Gate States for Gate Entry */ 1296 Netc_Eth_Ip_AdminGateOperationType AdminGateOperationType; /*!< Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 1297 } Netc_Eth_Ip_GateEntryAdminControlListDataType; 1298 1299 /*! 1300 * @brief defines Time Gate Scheduling Table entries for ENETC. 1301 * implements Netc_Eth_Ip_TimeGateSchedulingEntryDataType_structure 1302 */ 1303 typedef struct 1304 { 1305 uint32 TimeGateSchedulingTable_EID; /*!< Time Gate Scheduling Table Entry ID, which is actually the port index of switch */ 1306 uint64 AdminBaseTime; /*!< Administrative Base Time */ 1307 uint32 AdminCycleTime; /*!< Administrative Cycle Time */ 1308 uint32 AdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 1309 uint16 AdminControlListLength; /*!< Administrative Control List Length */ 1310 Netc_Eth_Ip_GateEntryAdminControlListDataType GateEntryAdminControlListData[NETC_ETH_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; 1311 } Netc_Eth_Ip_TimeGateSchedulingEntryDataType; 1312 1313 /*! 1314 * @brief defines VLAN Address Filter Table entries for ENETC. 1315 * implements Netc_Eth_Ip_VLANFilterTableEntryDataType_structure 1316 */ 1317 typedef struct 1318 { 1319 uint16 VLANFilterTable_EID; /*!< VLAN Filter Table Entry ID */ 1320 uint16 VLANId; /*!< VLAN ID used for filtering */ 1321 Netc_Eth_Ip_VlanProtocolIdentifierType TPID; /*!< TPID used for filtering */ 1322 uint16 SIBitmap; /*!< Bitmap of the SIs for which the filter is used */ 1323 } Netc_Eth_Ip_VLANFilterTableEntryDataType; 1324 1325 /** 1326 * @brief Receive Flow Steering configuration data type. 1327 * @details Structure used to define the attributes of a RFS entry. 1328 * implements Netc_Eth_Ip_RfsEntryType_structure 1329 */ 1330 typedef struct 1331 { 1332 uint8 RfsTableEntryId; /*!< RFS Table Entry ID */ 1333 uint8 Enable; /*!< RFS Entry Enable bit. When set the entry is valid. */ 1334 uint8 Mode; /*!< Defines the steering mode: Discard/drop, steer to group or steer to BDR (within an SI). */ 1335 uint8 Result; /*!< Represents either group or BDR, as defined by Mode attribute. */ 1336 uint8 IpPresent; /*!< If set, IP header is present */ 1337 uint8 IpPresentMask; /*!< Mask field programmable for comparison. */ 1338 uint8 L4ProtPresent; /*!< If set L4 protocol is present. */ 1339 uint8 L4ProtPresentMask; /*!< Mask field programmable for comparison. */ 1340 uint8 TcpUdpPresent; /*!< If set TCP header or UDP header is present. */ 1341 uint8 TcpUdpPresentMask; /*!< Mask field programmable for comparison. */ 1342 uint8 Ipv4Ipv6; /*!< If set (1) IP addresses are IPV4 addresses, if cleared (0) IP addresses are IPV6 addresses. */ 1343 uint8 Ipv4Ipv6Mask; /*!< Mask field programmable for comparison. */ 1344 uint8 UdpTcp; /*!< If set (1) UDP header, if cleared (0) TCP header. */ 1345 uint8 UdpTcpMask; /*!< Mask field programmable for comparison. */ 1346 uint8 L4ProtocolMask; /*!< Mask field programmable for comparison. */ 1347 uint8 L4Protocol; /*!< Indicates which L4 protocol is encapsulated. */ 1348 uint32 L4DestPortMask; /*!< Mask field programmable for comparison. */ 1349 uint32 L4DestPort; /*!< Destination port. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1350 uint32 L4SrcPortMask; /*!< Mask field programmable for comparison. */ 1351 uint32 L4SrcPort; /*!< Source port. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1352 uint64 DestIpAddrMaskLow; /*!< Mask field programmable for comparison. */ 1353 uint64 DestIpAddrMaskHigh; /*!< Mask field programmable for comparison. */ 1354 uint64 DestIpAddrLow; /*!< IPv4/IPv6 destination address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1355 uint64 DestIpAddrHigh; /*!< IPv4/IPv6 destination address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1356 uint64 SrcIpAddrMaskLow; /*!< Mask field programmable for comparison. */ 1357 uint64 SrcIpAddrMaskHigh; /*!< Mask field programmable for comparison. */ 1358 uint64 SrcIpAddrLow; /*!< IPv4/IPv6 source address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1359 uint64 SrcIpAddrHigh; /*!< IPv4/IPv6 source address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1360 } Netc_Eth_Ip_RfsEntryType; 1361 1362 /*! 1363 * @brief Eth Rate Policer Table CFGE_DATA Format. 1364 */ 1365 typedef struct { 1366 uint32 Cfge_Cir; /*!< Committed Information Rate (CIR) field */ 1367 uint32 Cfge_Cbs; /*!< Committed Burst SizeExpressed (CBS) field */ 1368 uint32 Cfge_Eir; /*!< Excess Information Rate (EIR) field */ 1369 uint32 Cfge_Ebs; /*!< Excess Burst Size (EBS) field */ 1370 boolean Cfge_Mren; /*!< Mark All Frames Red Enable, 0:disable, 1:enable */ 1371 boolean Cfge_Doy; /*!< Drop on Yellow, 0:not dropped, 1:dropped */ 1372 boolean Cfge_Cm; /*!< Color mode, 0:color blind, 1:color aware */ 1373 boolean Cfge_Cf; /*!< Coupling flag, 0:C and E token buckets are not coupled. 1:C and E token buckets are coupled*/ 1374 boolean Cfge_Ndor; /*!< No Drop on Red, 0:frames marded "red" are alwayts dropped, 1: not dropped */ 1375 Netc_Eth_Ip_SDUType Cfge_SduType; /*!< Service Data Unit Type */ 1376 } Netc_Eth_Ip_RatePolicerTableCFGEDataType; 1377 1378 /*! 1379 * @brief Rate Eth Policer Table STSE_DATA Format. 1380 */ 1381 typedef struct { 1382 uint64 Stse_ByteCount; /*!< Number of bytes received by the rate policer instance */ 1383 uint32 Stse_DropFrames; /*!< Number of frames dropped by the rate policer instance */ 1384 uint32 Stse_Dr0GrnFrames; /*!< Number of frames marked green with DR=0 by the rate policer instance */ 1385 uint32 Stse_Dr1GrnFrames; /*!< Number of frames marked green with DR=1 by the rate policer instance */ 1386 uint32 Stse_Dr2YlwFrames; /*!< Number of frames marked yellow with DR=2 by the rate policer instance */ 1387 uint32 Stse_RemarkYlwFrames; /*!< Number of frames re-marked from green to yellow by the rate policer instance */ 1388 uint32 Stse_Dr3RedFrames; /*!< Number of frames marked red (DR=3) by the rate policer instance */ 1389 uint32 Stse_RemarkRedFrames; /*!< Number of frames re-marked from green or yellow to red by the rate policer instance */ 1390 uint32 Stse_Lts; /*!< Last timestamp */ 1391 uint32 Stse_CommittedTokenBucketInteger; /*!< Committed token bucket contents, integer portion */ 1392 uint32 Stse_CommittedTokenBucketFractional; /*!< Committed token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BCS) */ 1393 uint32 Stse_ExcessTokenBucketInteger; /*!< Excess token bucket contents, integer portion (32 bits)*/ 1394 uint32 Stse_ExcessTokenBucketFranctional; /*!< Excess token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BES) */ 1395 } Netc_Eth_Ip_RatePolicerTableSTSEDataType; 1396 1397 /*! 1398 * @brief defines Eth Rate Policer entries. 1399 * 1400 */ 1401 typedef struct 1402 { 1403 uint32 RatePolicerEntryId; /* Entry ID */ 1404 Netc_Eth_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1405 boolean ConfigurationElementUpdate; /* Update Actions, CFGEU */ 1406 boolean FunctionalEnableElementUpdate; /* Update Actions, FEEU */ 1407 boolean PolicerStateElementUpdate; /* Update Actions, PSEU */ 1408 boolean StatisticsElementUpdate; /* Update Actions, STSEU */ 1409 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1410 } Netc_Eth_Ip_RatePolicerEntryDataType; 1411 1412 /*! 1413 * @brief defines Eth Rate Policer entry response data. 1414 * 1415 */ 1416 typedef struct 1417 { 1418 uint32 RatePolicerEntryId; /* Entry ID */ 1419 Netc_Eth_Ip_RatePolicerTableSTSEDataType RatePolicerStseData; /* Statistics Element Data */ 1420 Netc_Eth_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1421 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1422 boolean MarkRedFlag; /* 0b = Indicates that the rate policer blocking "mark all frames red" function has not been triggered */ 1423 /* 1b = Indicates that all frames arriving at this rate policer are marked red by the rate policer blocking "mark all frames red" function. */ 1424 } Netc_Eth_Ip_RatePolicerEntryRspDataType; 1425 1426 /*! 1427 * @brief Key Construction Rule 1428 * @implements : Netc_Eth_Ip_KeyConstructionRuleType_struct 1429 */ 1430 typedef struct 1431 { 1432 uint32 EthKeyConstructionRegValue; /**< Value to be added in the Key Construction Register*/ 1433 uint32 EthPayloadField0RegValue; /**< Value to be added in the Payload Field 0 Register*/ 1434 uint32 EthPayloadField1RegValue; /**< Value to be added in the Payload Field 0 Register*/ 1435 } Netc_Eth_Ip_KeyConstructionRuleType; 1436 1437 /*! 1438 * @brief Ingress Stream Table CFGE_DATA Format. 1439 */ 1440 typedef struct { 1441 uint32 RatePolicer_EID; /*!< Rate Policer Entry ID */ 1442 uint32 StreamGateInstance_EID; /*!< Stream Gate Instance Entry ID */ 1443 uint32 IngressStreamCounter_EID; /*!< Ingress Stream counter Index */ 1444 uint16 StationInterfaceMap; /*!< Station Interface Map */ 1445 uint16 MaximumServiceDataUnit; /*!< Maximum Service Data Unit */ 1446 Netc_Eth_Ip_SDUType SduType; /*!< Service Data Unit type to use for MSDU (Maximum Service Data Unit) field. */ 1447 Netc_Eth_Ip_EnetcForwardingActionDataType ForwardingActions; /*!< Forwarding actions */ 1448 uint8 DropResilience; /*!< New Drop Resilience (DR) to be assigned to the frame, if ODR is 1. */ 1449 uint8 InternalPriorityValue; /*!< Internal Priority Value (IPV) */ 1450 boolean OverrideStreamGateInstanceEID; /*!< Override Stream Gate Instance Entry ID */ 1451 boolean OverrideRatePolicerInstanceEID; /*!< Override Rate Policer (instance) ID. */ 1452 boolean OverrideDR; /*!< Override Drop Resilience (DR) */ 1453 boolean OverrideIPV; /*!< Override Internal Priority Value (IPV) */ 1454 boolean StreamFilteringEnable; /*!< Stream Filtering Enable */ 1455 } Netc_Eth_Ip_IngressStreamTableCFGEDataType; 1456 1457 /*! 1458 * @brief defines Ingress Stream entries. 1459 * 1460 */ 1461 typedef struct 1462 { 1463 uint32 IngressStreamEntryId; /* Entry ID */ 1464 Netc_Eth_Ip_IngressStreamTableCFGEDataType IngressStreamCfgeData; /* CFGE Data */ 1465 } Netc_Eth_Ip_IngressStreamEntryDataType; 1466 1467 /*! 1468 * @brief defines Ingress Stream Identification table request/response data type. 1469 * 1470 */ 1471 typedef struct 1472 { 1473 uint32 IngrStreamIdenResumeEntryId; /* Ingress Stream Identification table Resume Entry ID */ 1474 uint32 IngrStreamIdenEntryId; /* Ingress Stream Identification table Entry ID */ 1475 uint32 IngrStreamEntryId; /* Ingress Stream table Entry ID */ 1476 Netc_Eth_Ip_KeyTypeIdxType Keye_Keytype; /* Key type for key construction */ 1477 uint32 Keye_FrmKey[4U]; /* Frame portion of the Key */ 1478 } Netc_Eth_Ip_IngrStremIdentificationTableDataType; 1479 1480 /*! 1481 * @brief defines Stream Gate Instance entries. 1482 * 1483 */ 1484 typedef struct 1485 { 1486 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1487 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1488 uint64 AdminBaseTime; /* Admin Base Time */ 1489 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1490 Netc_Eth_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1491 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1492 Netc_Eth_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1493 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1494 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1495 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1496 } Netc_Eth_Ip_StreamGateInstanceEntryDataType; 1497 1498 /*! 1499 * @brief defines Stream Gate Instance entries response data type. 1500 * 1501 */ 1502 typedef struct 1503 { 1504 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1505 uint32 OperationalSGCLEntryID; /* Operational Stream Gate Control List Entry ID */ 1506 uint64 ConfigChangeTime; /* Configuration Change Time */ 1507 uint64 OperationalBaseTime; /* Operational Base Time */ 1508 uint32 OperationalCycleTimeExt; /* Oper Cycle Time Extension */ 1509 uint8 SGISEOex; /* Octets Exceeded Flag */ 1510 uint8 SGISEIrx; /* Invalid Receive Flag */ 1511 uint8 SGISEState; /* Current Gate Instance State */ 1512 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1513 uint64 AdminBaseTime; /* Admin Base Time */ 1514 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1515 Netc_Eth_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1516 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1517 Netc_Eth_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1518 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1519 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1520 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1521 } Netc_Eth_Ip_StreamGateInstanceEntryRspDataType; 1522 1523 /*! 1524 * @brief defines Stream Gate Control List entries data type. 1525 */ 1526 typedef struct 1527 { 1528 uint32 SGCL_TimeInterval; /* Time Interval for Gate Entry i */ 1529 uint32 SGCL_IntervalOctetsMax; /* Interval Octets Maximum for Gate Entry i, */ 1530 uint8 SGCL_Ipv; /* Internal Priority Value for Gate Entry i */ 1531 boolean SGCL_Oipv; /* Override Internal Priority Value for Gate Entry i */ 1532 boolean SGCL_IntervalOctetMaxEnable; /* Interval Octet Maximum Enabled for Gate Entry i, */ 1533 Netc_Eth_Ip_SGITABLE_GateStateType SGCL_GateState; /* Gate State for Gate Entry i, */ 1534 } Netc_Eth_Ip_SGCLEntriesDataType; 1535 1536 /*! 1537 * @brief defines Stream Gate Control List table data type. 1538 * 1539 */ 1540 typedef struct 1541 { 1542 uint32 SGCLEntryId; /* Stream Gate Control List Entry ID */ 1543 uint32 Cfge_CycleTime; /* This field specifies the cycle time of the stream gate control list. */ 1544 uint8 Cfge_ListLength; /* This field indicates the number of entries in the stream gate control list. */ 1545 uint8 Cfge_ExtIpv; /* List Extension Internal Priority Value */ 1546 boolean Cfge_ExtOIPV; /* Extension Override Internal Priority Value */ 1547 Netc_Eth_Ip_SGITABLE_GateStateType Cfge_ExtGtst; /* Extension Gate State */ 1548 Netc_Eth_Ip_SGCLEntriesDataType *ListEntries; /* Stream Gate Control List entries pointer */ 1549 Netc_Eth_Ip_SGCLTABLE_RefCountType Sgclse_RefCount; /* Ref count, an element in response data buffer */ 1550 } Netc_Eth_Ip_SGCLTableDataType; 1551 1552 /*! 1553 * @brief Request and Response Data Buffer Format of Tables supported by ENETC. 1554 */ 1555 typedef struct { 1556 uint32 TableDataField[NETC_ETH_IP_TABLEDATA_BUFFER_LENGTH]; /*!< the request and response data buffer share the same memory */ 1557 } Netc_Eth_Ip_EnetcTableDataType; 1558 1559 /** 1560 * @brief Everything that can be configured by the PSI for itself(also Port) or for the VSIs. 1561 * @details This structure contains general configuration of the NETC for Ethernet driver. 1562 * This will affect also every VSI configured aftwareds in other projects. Please, be aware that this will affect all other cotrollers used. 1563 */ 1564 typedef struct 1565 { 1566 /* General configurations of SI. */ 1567 uint8 siId; /*< The index of the SI */ 1568 boolean enableSi; /*< Enable/disable the SI. */ 1569 uint8 NumberOfRxBDR; /*< The number of allowed RX BDR */ 1570 uint8 NumberOfTxBDR; /*< The number of allowed TX BDR */ 1571 uint8 SIBandwidthWeight; /*< SI Bandwidth Weight */ 1572 uint8 numberOfMSIs; /*< The number of assigned MSIs */ 1573 uint8 priorityToTrafficClassMapping[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*< Port station interface a configuration register 1 (PSI1CFGR1 - PSI7CFGR1). 1574 The field will not be used for PSI0 */ 1575 /** TODO: other fields from Port station interface 0 configuration register 0 (PSI0CFGR0) */ 1576 /* MAC configurations */ 1577 uint8 primaryMACAddress[6U]; /*< The primary MAC address of the SI. For PSI0 this actually gets written in PMAR0 and PMAR1 */ 1578 /* TODO: Permission to change MAC address Boolean */ 1579 /* TODO: MAC filtering configuration */ 1580 1581 /* VLAN configurations */ 1582 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1583 boolean EnableSIVlan; /*! SI-based VLAN information is added on transmit and removed on receive if matched (PSIaVLANR). */ 1584 Netc_Eth_Ip_VlanType SiVLANConfig; /*!< Vlan configuration for each SI-based */ 1585 boolean EnableSoftwareVlanInsert; /*!< Enable Software VLAN Insertion (PSICFGR0[SIVIE]) */ 1586 uint8 SIVlanControl; /*!< Determines which VLAN Ethertypes can be inserted by the SI driver (PSICFGR0[SIVC]) */ 1587 boolean EnableVLANTagExtract; /*!< Controls whether SI-based VLAN tag is removed from the frame before delivery to the SI(PSICFGR0[VTE]) */ 1588 #endif 1589 boolean enableAntiSpoofing; /*< Enable or disable the Anti-Spoofing */ 1590 1591 /*SI Runtime permissions */ 1592 boolean changeMACAllowed;/* Permission to change VLAN membership Boolean */ 1593 boolean hashFilterUpdateAllowed;/* Permission to update VLAN filtering configuration */ 1594 boolean multicastPromiscuousChangeAllowed; /*Permission to enable Multicast Promiscuos mode */ 1595 1596 /* boolean enableMulticastVLANPromiscuosMode; Enable or disable the Multicast VLAN Promiscuos Mode */ 1597 /* boolean enableUnicastVLANPromiscuosMode; Enable or disable the Unicast VLAN Promiscuos Mode */ 1598 1599 } Netc_Eth_Ip_GeneralSIConfigType; 1600 /** @endcond DRIVER_INTERNAL_USE_ONLY */ 1601 1602 1603 /** @brief Each enum value will be guarded by a define if this is present on the platform 1604 * implements Netc_Eth_Ip_PcieFunction_enum 1605 */ 1606 typedef enum 1607 { 1608 TIMER = 0U, /* Timer Function */ 1609 EMDIO, /* EMDIO Function */ 1610 SWITCH, /* SWITCH Function */ 1611 ENETC, /* This value can be ONLY given as a parameter to Netc_Eth_Ip_DumpErrorCapture to get the error counters statistics for ENETC module */ 1612 PSI, /* Name according to NETC Reference Manual ENETC PF (SI0)*/ 1613 VSI /* Name according to NETC Reference Manual ENETC PF (SI+)*/ 1614 } Netc_Eth_Ip_PcieFunction; 1615 1616 /** @brief Structure that contain the name of PCIe function and the Error Status corresponding to this function. 1617 * For the StatusError, the first 3 bits are set based on the following rule: 1618 * - if a fatal error happened, bit number 0 is set. 1619 * - if a non fatal error happened, bit number 1 is set. 1620 * - if a correctable error happened, bit number 2 is set. 1621 */ 1622 typedef struct 1623 { 1624 Netc_Eth_Ip_PcieFunction Function; 1625 uint8 StatusErrors; 1626 } Netc_Eth_Ip_PcieFunctionErrorsReported; 1627 1628 /** @brief Signature of the callback function invoked when a specific error event is encountered in PCIE AER 1629 * 1630 * First parameter will always be returned as 0, since PSI0 is the only SI responsable with this feature. 1631 * The second pamameter is a list of fixed size of structures. Each structure has a function name(Netc_Eth_Ip_PcieFunction enum) 1632 * and a status corresponding to the function. 1633 * The codification of the status error is: 1634 * - if a fatal error happened, bit number 0 is set. 1635 * - if a non fatal error happened, bit number 1 is set. 1636 * - if a correctable error happened, bit number 2 is set. 1637 */ 1638 typedef void (*Netc_Eth_Ip_PcieAerErrorReportingCallbackType)(const uint8 ctrlIndex, const Netc_Eth_Ip_PcieFunctionErrorsReported *options); 1639 1640 /** 1641 * @brief Credit based shaper configuration. 1642 * @note Not supported yet. 1643 */ 1644 typedef struct 1645 { 1646 /* To improve the speed of the init of the drivers, Bandwidth and hiCredit are calculated in the upper layes */ 1647 boolean EthEgressCBShaperEnable; /*!< Enable the Credit-Based Shaper. */ 1648 uint32 EthEgressCBShaperBandwidth; /*!< Bandwidth of the Credit-Based Shaper. Bandwidth = (idleSlope/portTxRate) * 100, Note: total CBS bandwidth should be less than 75% */ 1649 uint32 EthEgressHiCredit; /*!< HiCredit if the Credit-Based Shaper. (hiCredit on credit) = maxSizedFrame * Bandwidth * (enetClockFrequency / portTxRate) */ 1650 uint32 EthMaxSizedFrame; /*!< Max Frame Size, should be less the 1536 bytes */ 1651 } Netc_Eth_Ip_CreditBasedShaperConfigType; 1652 1653 /*! 1654 * @brief defines Ingress Port Filter Table CFGE_DATA type. 1655 */ 1656 typedef struct 1657 { 1658 uint32 CfgeTargetForSelectedFilterAction; /*!< FLTA_TGT filed in CFGE_DATA format */ 1659 uint8 CfgeIpv; /*!< IPV (internal priority value) filed in CFGE_DATA format */ 1660 uint8 CfgeDr; /*!< DR (drop resilience) field in CFGE_DATA format */ 1661 uint8 CfgeRelativePrecedentResolution; /*!< RPR field in CFGE_DATA format */ 1662 boolean CfgeOverrideIpv; /*!< OIPV (override internal priority value) field in CFGE_DATA format*/ 1663 boolean CfgeOverrideDr; /*!< ODR (override drop resilience) field in CFGE_DATA format */ 1664 boolean CfgeWakeOnLanTriggerEnable; /*!< WOLTE filed in CFGE_DATA format */ 1665 Netc_Eth_Ip_CfgeFilterForwardingActionDataType CfgeFilterForwardingAction; /*!< FLTFA field in CFGE_DATA format */ 1666 Netc_Eth_Ip_CfgeFilterActionDataType CfgeFilterAction; /*!< FLTA field in CFGE_DATA format */ 1667 } Netc_Eth_Ip_IngressPortFilterCfgeDataType; 1668 1669 /*! 1670 * @brief defines Ingress Port Filter Table KEYE_DATA type. 1671 * implements Netc_Eth_Ip_IngressPortFilterKeyeDataType_structure 1672 */ 1673 typedef struct 1674 { 1675 uint16 KeyePrecedence; /*!< Precedence field */ 1676 uint16 keyeFrmAttributeFlags; /*!< Frame Attribute Flags field */ 1677 uint16 KeyeFrmAttributeFlagsMask; /*!< Frame Attribute Flags Mask field */ 1678 uint8 KeyeDifferentiatedServicesCodePoint; /*!< Differentiated Services Code Point field */ 1679 uint8 KeyeDifferentiatedServicesCodePointMask; /*!< Differentiated Services Code Point Mask field */ 1680 uint16 KeyeOuterVLANTagControlInformation; /*!< Outer VLAN Tag Control Information field */ 1681 uint16 KeyeOuterVLANTagControlInformationMask; /*!< Outer VLAN Tag Control Information Mask field */ 1682 uint8 KeyeDstMacAddr[6U]; /*!< Destination MAC Address field */ 1683 uint8 KeyeDstMacAddrMask[6U]; /*!< Destination MAC Address Mask field */ 1684 uint8 KeyeSrcMacAddr[6U]; /*!< Source MAC Address field */ 1685 uint8 KeyeSrcMacAddrMask[6U]; /*!< Source MAC Address Mask field */ 1686 uint16 KeyeInnerVLANTagControlInformation; /*!< Inner VLAN Tag Control Information field */ 1687 uint16 KeyeInnerVLANTagControlInformationMask; /*!< Inner VLAN Tag Control Information Mask field */ 1688 uint16 KeyeEtherType; /*!< EtherType field */ 1689 uint16 KeyeEtherTypeMask; /*!< EtherType Mask field */ 1690 uint8 KeyeIPProtocol; /*!< IP Protocol field */ 1691 uint8 KeyeIPProtocolMask; /*!< IP Protocol Mask field */ 1692 uint32 KeyeIPSourceAddress[4U]; /*!< IP Source Address field */ 1693 uint32 KeyeIPSourceAddressMask[4U]; /*!< IP Source Address Mask field */ 1694 uint16 KeyeL4SourcePort; /*!< L4 Source Port field */ 1695 uint16 KeyeL4SourcePortMask; /*!< L4 Source Port Mask field */ 1696 uint32 KeyeIPDestinationAddress[4U]; /*!< IP Destination Address field */ 1697 uint32 KeyeIPDestinationAddressMask[4U]; /*!< IP Destination Address Mask field */ 1698 uint16 KeyeL4DestinationPort; /*!< L4 Destination Port field */ 1699 uint16 KeyeL4DestinationPortMask; /*!< L4 Destination Port Mask field */ 1700 uint8 KeyePayloadBytes[24U]; /*!< Payload Bytes field */ 1701 uint8 KeyePayloadBytesMask[24U]; /*!< Payload Bytes Mask field */ 1702 } Netc_Eth_Ip_IngressPortFilterKeyeDataType; 1703 1704 /*! 1705 * @brief defines Ingress Port Filter Table entries. 1706 * implements Netc_Eth_Ip_IngressPortFilterEntryDataType_structure 1707 */ 1708 typedef struct 1709 { 1710 uint32 IngressPortFilterEntryID; /*!< Ingress Port Filter Table Entry ID */ 1711 Netc_Eth_Ip_IngressPortFilterCfgeDataType IngressPortFilterCfgeData; /*!< Ingress Port Filter Table CFGE_DATA format */ 1712 Netc_Eth_Ip_IngressPortFilterKeyeDataType IngressPortFilterkeyeData; /*!< Ingress Port Filter Table KEYE_DATA format */ 1713 uint64 IngressPortFilterMatchCount; /*!< Ingress Port Filter Table Match Count Data */ 1714 } Netc_Eth_Ip_IngressPortFilterEntryDataType; 1715 1716 /*! @brief Enetc general configuration. To be applied by the PSI for the whole Enetc controller part. */ 1717 typedef struct 1718 { 1719 uint8 numberOfConfiguredSis; /*!< The number of enabled SIs */ 1720 const Netc_Eth_Ip_GeneralSIConfigType (*stationInterfaceGeneralConfig)[FEATURE_NETC_ETH_NUMBER_OF_CTRLS]; /*!< The general configuration for all the enabled SIs */ 1721 volatile Netc_Eth_Ip_VsiToPsiMsgType const *RxVsiMsgCmdToPsi[FEATURE_NETC_ETH_NUM_OF_VIRTUAL_CTRLS]; /*!< Array of addresses where PSI will store the receive message from VSI. */ 1722 /* boolean enablePortOuterVlan; PONVLANR */ /** SI-based VLAN information is added on transmit and removed on receive if matched. */ 1723 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1724 /* boolean useNativePortOuterVlan; PONVLANR - PNE bitfield */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1725 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1726 /* Netc_Eth_Ip_VlanType *portInnerVLANConfig; TODO: Decide if this will be used at runtime or given in configuration. */ 1727 /* boolean enableInnerOuterVlan; PINVLANR */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1728 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1729 /* boolean useNativePortInnerVlan; PINVLANR - PNE bitfield */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1730 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1731 /* Netc_Eth_Ip_VlanType *portOuterVLANConfig; TODO: Decide if this will be used at runtime or given in configuration. */ 1732 /* TBD: Port VLAN classification control register (PVCLCTR) */ 1733 /* TBD: Parse configuration (several registers) */ 1734 /* TBD: Port pause configuration */ 1735 /* TBD: Port station interface VLAN filtering mode register (PSIVLANFMR) */ 1736 Netc_Eth_Ip_ICMType priorityToICM[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of internal priority to ICM. Receive IPV to ICM priority mapping register 0 (IPV2ICMPMR0) */ 1737 uint8 priorityToTrafficClassic[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of transmit BD rings priority to traffic class. Transmit priority to traffic class mapping register 0 (PRIO2TCMR0) */ 1738 uint8 pcpToIpv[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of Pcp from VLAN Tag to internal priority. VLAN to IPV mapping profile a register 0 (VLANIPVMP0R0 - VLANIPVMP1R0) */ 1739 /* TBD: VLAN to DR mapping profile a register (VLANDRMP0R - VLANDRMP1R) */ 1740 /* TBD: All the tables */ 1741 uint8 portPPDUByteCountOverhead; /* PPDU Byte count overhead which includes IPG, SFD and Preamble. */ 1742 uint8 portMACSecByteCountOverhead; /* Number of bytes of overhead due to MACSec encapsulation */ 1743 uint32 portTimeGateSchedulingAdvanceTimeOffsetReg; /* This is the port time gate scheduling advance time offset register */ 1744 boolean portTimeAwareShaperEnable; /*!< If the data for time gate scheduling talbe is configured */ 1745 uint64 portEgressAdminBaseTime; /*!< Administrative Base Time */ 1746 uint32 portEgressAdminCycleTime; /*!< Administrative Cycle Time */ 1747 uint32 portEgressAdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 1748 uint8 numberOfGateControlListEntries; /*!< Number of entries in Administrative Gate Control list. */ 1749 const Netc_Eth_Ip_GateEntryAdminControlListDataType (*TimeGateControlListEntries)[NETC_ETH_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; /*!< Pointer to an array containing the gate control list for port. */ 1750 #if (NETC_ETH_MAX_NUMBER_OF_IPFTABLE_LIST > 0U) 1751 uint8 numberOfIPFTableList; /*!< Number of ingress port filter table entries in list. */ 1752 const Netc_Eth_Ip_IngressPortFilterEntryDataType (*IngressPortFilterTableList)[NETC_ETH_MAX_NUMBER_OF_IPFTABLE_LIST]; /*!< Pointer to an array containing the ingress port filter table entries list. */ 1753 #endif 1754 /* ------------ Port configuration ------------- */ 1755 /* TBD: Port configuration register (PCR) - low priority for basic driver */ 1756 /* TBD: Port TPID acceptance register (PTAR) - low priority for basic driver */ 1757 /* TBD: Port QoS mode register (PQOSMR) - low priority for basic driver */ 1758 /* TBD: Port parser configuration register (PPCR) - low priority for basic driver */ 1759 /* TBD: Port ingress port filter configuration register (PIPFCR) - low priority for basic driver */ 1760 /* TBD: Port stream gate configuration register (PSGCR) - low priority for basic driver */ 1761 /* TBD: A lot of other stream gate and frame preemption settings - low priority for basic driver */ 1762 Netc_Eth_Ip_CreditBasedShaperConfigType (*cbsConfig)[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Configuration of each CBS used. */ 1763 const Netc_Eth_Ip_KeyConstructionRuleType (*EthKeyConstruction)[2U]; 1764 #if (NETC_ETH_IP_NUMBER_OF_VLAN_FILTER_ENTRIES > 0) 1765 uint8 NumberOfVLANFilterEntries; /*!< NUmber of VLAN Filter Table entries. */ 1766 const Netc_Eth_Ip_VLANFilterTableEntryDataType (*VLANTableEntries)[NETC_ETH_IP_NUMBER_OF_VLAN_FILTER_ENTRIES]; /*!< Pointer to an array containing the configured VLAN Filter table entries. */ 1767 #endif 1768 #if (NETC_ETH_IP_NUMBER_OF_RP_ENTRIES > 0) 1769 uint8 NumberOfRPTableEntries; /*!< NUmber of Rate Policer Table entries. */ 1770 const Netc_Eth_Ip_RatePolicerEntryDataType (*RPTableEntries)[NETC_ETH_IP_NUMBER_OF_RP_ENTRIES]; /*!< Pointer to an array containing the configured Rate Policer table entries. */ 1771 #endif 1772 #if (NETC_ETH_NUMBER_OF_SGCL_ENTRIES > 0U) 1773 uint8 NumberOfSGCLEntries; /*!< Number of Stream Gate Instance entries */ 1774 const Netc_Eth_Ip_SGCLTableDataType (*StreamGateControlListEntries)[NETC_ETH_NUMBER_OF_SGCL_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Control Lists. */ 1775 #endif 1776 #if (NETC_ETH_NUMBER_OF_SGI_ENTRIES > 0U) 1777 uint8 NumberOfSGIEntries; /*!< Number of Stream Gate Instance entries */ 1778 const Netc_Eth_Ip_StreamGateInstanceEntryDataType (*StreamGateInstanceEntries)[NETC_ETH_NUMBER_OF_SGI_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Instances. */ 1779 #endif 1780 #if (NETC_ETH_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES > 0U) 1781 uint8 NumberOfIsiEntries; /*!< Number of Ingress Stream Identification entries. */ 1782 const Netc_Eth_Ip_IngrStremIdentificationTableDataType (*IsiEntries)[NETC_ETH_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES]; /*!< Pointer to an array containing the StreamIdentification configuration. */ 1783 #endif 1784 #if (NETC_ETH_NUMBER_OF_INGRESSSTREAM_ENTRIES > 0U) 1785 uint8 NumberOfIngrStreamEntries; /*!< Number of Ingress Stream entries */ 1786 const Netc_Eth_Ip_IngressStreamEntryDataType (*IngressStreamEntries)[NETC_ETH_NUMBER_OF_INGRESSSTREAM_ENTRIES]; /*!< Pointer to an array containing configurations for Ingress Stream. */ 1787 #endif 1788 uint16 maskMACPromiscuousMulticastEnable; /*!< Enable/Disable promiscuous multicast for all controllers. */ 1789 uint16 maskMACPromiscuousUnicastEnable; /*!< Enable/Disable promiscuous unicast for all controllers. */ 1790 1791 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1792 uint32 CustomVlanEthertype1; /*!< Configure for custom VLAN Ethertype 1 register (CVLANR1). */ 1793 uint32 CustomVlanEthertype2; /*!< Configure for custom VLAN Ethertype 1 register (CVLANR2). */ 1794 uint16 maskMACVLANPromiscuousEnable; /*!< Enable/Disable promiscuous VLAN for all controllers. */ 1795 uint32 maskVLANAllowUntaggedEnable; /*!< Enable/Disable permssion of the SI to receive untagged traffic 1796 while the VLAN support is enabled for ENTC0. */ 1797 #endif 1798 uint8 rxCheckSumOffloadingTCPUDP; /*!< Enable/Disable Rx Checksum offload for TCP/UDP. */ 1799 uint8 rxCheckSumOffloadingIPV4; /*!< Enable/Disable Rx Checksum offload for IPV4. */ 1800 /** TODO: other fields from Port station interface 0 configuration register 0 (PSI0CFGR0) */ 1801 1802 boolean enableUncorrectableErrors; /* Enable or disable the Uncorrectable Errors a PCIE level for all functions (SWITCH, ENETC, EMDIO, TIMER, PSI0, VSIx) */ 1803 boolean enableCorrectableErrors; /* Enable or disable the Correctable Errors a PCIE level for all functions (SWITCH, ENETC, EMDIO, TIMER, PSI0, VSIx) */ 1804 uint8 errorReportigSingleECCErrorsThreshold; /* The number of Single bit EC Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1805 uint8 errorReportingMultiBitECCErrorsThreshold; /* The number of Multi bit ECC errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1806 uint8 errorReportigIntegrityErrorsThreshold; /* The number of Integrity Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1807 uint8 errorReportingSystemBusErrorsThreshold; /* The number of System Bus Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1808 Netc_Eth_Ip_PcieAerErrorReportingCallbackType errorReportingCallback; 1809 #if ((STD_ON == NETC_ETH_IP_EXTENDED_BUFF) && (STD_ON == NETC_ETH_IP_CUSTOM_TAG_SUPPORT)) 1810 uint16 CustomTPID; 1811 uint8 CustomIPV; 1812 uint8 CustomDR; 1813 #endif 1814 uint8 defaultIPV; /*!< PQOSMR[DDR] - set the default value of Drop Resilience which is used in following cases: 1815 1. enableVlanToIpvMapping is disabled. 1816 2. enableVlanToIpvMapping is enabled, but the incoming frame is not VLAN tagged. */ 1817 uint8 defaultDR; /*!< PQOSMR[DIPV] - set the default value of Drop Resilience which is used in following cases: 1818 1. enableVlanToIpvMapping is disabled. 1819 2. enableVlanToIpvMapping is enabled, but the incoming frame is not VLAN tagged. */ 1820 } Netc_Eth_Ip_EnetcGeneralConfigType; 1821 1822 /** @brief The station interface configuration. This applies to all SIs either PSI or VSI. */ 1823 typedef struct 1824 { 1825 boolean enableVlanToIpvMapping; /*!< V2IPVE - enables the mapping of PCP+DEI to IPV for each SI. */ 1826 boolean discardBroadcastFrames; /*!< RNBM - enables or disables discarding all broadcast frames */ 1827 boolean discardMulticastFrames; /*!< RNMM - enables or disables discarding all multicast frames */ 1828 boolean discardUnicastFrames; /*!< RNUM - enables or disables discarding all unicast frames */ 1829 uint8 vlanToIpv[16U]; /*!< Station interface VLAN to IPV mapping register 0 (SIVLANIPVMR0). PCP+DEI mapping to IPV */ 1830 uint8 ipvToBDR[8U]; /*!< Station interface IPV to ring mapping register (SIIPVBDRMR0). Mapping of IPV to BDR */ 1831 uint8 NumberOfRxBDR; /*!< The number of configured RX BDR */ 1832 uint8 NumberOfTxBDR; /*!< The number of configured TX BDR */ 1833 Netc_Eth_Ip_CommandBDType commandBDConfig; /*!< This will store the configuration of the command BDR. */ 1834 Netc_Eth_Ip_VsiToPsiMsgType *VSItoPSIMsgCommand; /*!< Address of the command message sent from VSI to PSI. */ 1835 uint8 CtrlLogicalIndex; /*!< This member keep the value of controller index for the callback function. */ 1836 1837 uint32 *txMruMailboxAddr; /*!< Mailbox address for TX. */ 1838 uint32 *rxMruMailboxAddr; /*!< Mailbox address for RX. */ 1839 uint32 *siMsgMruMailboxAddr; /*!< Mailbox address for VSI to PSI messaging. */ 1840 boolean EnableSIMsgInterrupt; /*!< Interrupt SI support messaging enable. */ 1841 1842 uint8 MACFilterTableMaxNumOfEntries; /*!< Maximum number of entries in the MAC filter table. */ 1843 uint32 RxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1844 uint32 TxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1845 } Netc_Eth_Ip_StationInterfaceConfigType; 1846 1847 /** @brief Specialization of ring configuration for Tx Rings. */ 1848 typedef struct 1849 { 1850 Netc_Eth_Ip_TxBDRType *RingDesc; /*!< Buffer descriptor ring start address. */ 1851 Netc_Eth_Ip_ChCallbackType Callback; /*!< Callback function for current channel. */ 1852 uint8 *Buffer; /*!< Buffer data pool start address */ 1853 uint16 ringSize; /*!< Number of buffers descriptors for the current ring. */ 1854 uint16 maxRingSize; /*!< The maximum number of descriptors for the current ring between all variants. 1855 It is used for AUTOSAR specification. */ 1856 uint16 bufferLen; /*!< Length of each individual buffer in a pool. */ 1857 uint16 maxBuffLen; /*!< Maximum buffer size length supported by a transmit buffer for curent ring. 1858 This member is variant aware, it is used for AUTOSAR specification. */ 1859 uint8 Weight; /*!< Weight value. (0 to 7) */ 1860 uint8 Priority; /*!< Priority. 0 is lowest, 7 is highest */ 1861 uint32 TimerThreshold; /*!< Timer threshold, specified in units of NETC clock cycles. 1862 This value determines the maximum amount of 1863 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1864 (no. of packets) threshold is reached. */ 1865 uint8 PacketsThreshold; /*!< This value determines the minimum number of packets transmitted before 1866 raising an interrupt. 2^(PacketsThreshold-1) packets*/ 1867 } Netc_Eth_Ip_TxRingConfigType; 1868 1869 /** @brief RX ring configuration */ 1870 typedef struct 1871 { 1872 Netc_Eth_Ip_RxBDRType *RingDesc; /*!< Buffer descriptor ring start address. */ 1873 Netc_Eth_Ip_ChCallbackType Callback; /*!< Callback function for current channel. */ 1874 uint8 *Buffer; /*!< Buffer data pool start address */ 1875 uint16 ringSize; /*!< Number of buffers descriptors for the current ring. */ 1876 uint16 maxRingSize; /*!< The maximum number of descriptors for the current ring between all variants. 1877 It is used for AUTOSAR specification. */ 1878 uint16 bufferLen; /*!< Length of each individual buffer in a pool */ 1879 uint16 maxBuffLen; /*!< Maximum buffer size length supported by a receive buffer for curent ring. 1880 This member is variant aware, it is used for AUTOSAR specification. */ 1881 uint32 TimerThreshold; /*!< Timer threshold, specified in units of NETC clock cycles. 1882 This value determines the maximum amount of 1883 time allowed between a first received packet until RBaICR0[ICPT] (no. of packets) 1884 threshold is reached. */ 1885 uint16 PacketsThreshold; /*!< This value determines the minimum number of packets received before 1886 raising an interrupt. 1 -> 16384*/ 1887 } Netc_Eth_Ip_RxRingConfigType; 1888 1889 /** 1890 * @cond DRIVER_INTERNAL_USE_ONLY 1891 * @brief Internal driver state structure 1892 */ 1893 typedef struct 1894 { 1895 const Netc_Eth_Ip_EnetcGeneralConfigType *generalConfig; /*!< ENETC Base Register configuration. Only used for PSI, NULL_PTR for VSI. */ 1896 uint8 CtrlLogicalIndex; /*!< This member keep the value of controller index for the callback function. */ 1897 Netc_Eth_Ip_CallbackType Callback; /*!< Callback function for general interrupts. */ 1898 /* --------------------- RX ------------------- */ 1899 Netc_Eth_Ip_ChCallbackType RxCallback[FEATURE_NETC_RX_BDR_COUNT]; /*!< Callback function for current Rx channel. */ 1900 /** TODO: Make the value store in this pointer array a const, if there is any possibility. */ 1901 Netc_Eth_Ip_RxBDRType *FirstRxRingDescAddr[FEATURE_NETC_RX_BDR_COUNT]; /*!< Array with starting address of each ring of descriptors for a SI. */ 1902 Netc_Eth_Ip_RxBDRType *RxCurrentDesc[FEATURE_NETC_RX_BDR_COUNT]; /*!< The current available receive buffer descriptor pointer array. */ 1903 uint8 *FirstRxDataBufferAddr[FEATURE_NETC_RX_BDR_COUNT]; /*!< Array with starting address of each data buffer used to store RX data by ring. */ 1904 uint16 RxRingSize[FEATURE_NETC_RX_BDR_COUNT]; 1905 uint16 rxCurrentIndex[FEATURE_NETC_RX_BDR_COUNT]; /*!< Index of the current decriptor in ring. */ 1906 uint16 RxDataBuffMaxLenAddr[FEATURE_NETC_RX_BDR_COUNT]; 1907 uint16 LogicRxConsumerIndex[FEATURE_NETC_RX_BDR_COUNT]; /*!< Store reception consumer index for each ring. */ 1908 1909 /* --------------------- TX ------------------- */ 1910 Netc_Eth_Ip_ChCallbackType TxCallback[FEATURE_NETC_TX_BDR_COUNT]; /*!< Callback function for current Tx channel. */ 1911 uint16 LogicTxProducerIndex[FEATURE_NETC_TX_BDR_COUNT]; /*!< Store transmission producer index for each ring. */ 1912 boolean LockTxBuffDescr[FEATURE_NETC_TX_BDR_COUNT][NETC_ETH_MAX_NUMBER_OF_TXBD]; /*!< This flag will show the state of the data buffer ready(= FALSE)/busy(= TRUE). */ 1913 uint32 lastTxDataBuffAddrIdx[FEATURE_NETC_TX_BDR_COUNT]; /*!< Last buffer address status checked. */ 1914 uint8 *TxDataBuffAddr[FEATURE_NETC_TX_BDR_COUNT][NETC_ETH_MAX_NUMBER_OF_TXBD]; /*!< Store address of the transmitted buffer for each descriptor. */ 1915 uint16 TxRingSize[FEATURE_NETC_TX_BDR_COUNT]; /*!< Number of buffers descriptors for the current ring. */ 1916 uint16 TxBufferLength[FEATURE_NETC_TX_BDR_COUNT]; /*!< Length of each individual buffer in a pool. */ 1917 Netc_Eth_Ip_TxBDRType *FirstTxRingDescAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< Buffer descriptor ring start address. */ 1918 uint8 *FirstTxDataBufferAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< Array with starting address of each data buffer used to store TX data by ring. */ 1919 uint16 TxDataBuffMaxLenAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< */ 1920 1921 Netc_Eth_Ip_VsiToPsiMsgType *VSItoPSIMsgCommand; /*!< The VSI command sends to PSI. */ 1922 uint8 NumberOfRxBDR; /*!< The number of configured RX BDR */ 1923 uint8 NumberOfTxBDR; /*!< The number of configured TX BDR */ 1924 Netc_Eth_Ip_StationInterfaceType SiType; /*!< The type of the SI (PSI or VSI). */ 1925 uint8 MACFilterTableMaxNumOfEntries; /*!< Maximum number of entries in the MAC filter table. */ 1926 1927 const Netc_Eth_Ip_GeneralSIConfigType (*SIGeneralConfig)[FEATURE_NETC_ETH_NUMBER_OF_CTRLS]; /*!< SI Runtime permissions. Valid only for PSI, NULL_PTR for VSI */ 1928 1929 #if (STD_ON == NETC_ETH_IP_HAS_EXTERNAL_RX_BUFFERS) 1930 uint32 *RxDataBuffAddr; /*!< Store address of the received external buffer for each descriptor. */ 1931 #endif 1932 uint32 TxTimerThreshold[FEATURE_NETC_TX_BDR_COUNT]; /*!< Timer threshold, specified in units of NETC clock cycles. 1933 This value determines the maximum amount of 1934 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1935 (no. of packets) threshold is reached. */ 1936 uint8 TxPacketsThreshold[FEATURE_NETC_TX_BDR_COUNT]; /*!< This value determines the minimum number of packets transmitted before 1937 raising an interrupt. 2^(PacketsThreshold-1) packets*/ 1938 uint32 RxTimerThreshold[FEATURE_NETC_RX_BDR_COUNT]; /*!< Timer threshold, specified in units of NETC clock cycles. 1939 This value determines the maximum amount of 1940 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1941 (no. of packets) threshold is reached. */ 1942 uint16 RxPacketsThreshold[FEATURE_NETC_RX_BDR_COUNT]; /*!< This value determines the minimum number of packets received before raising an interrupt. */ 1943 uint32 RxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1944 uint32 TxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1945 Netc_Eth_Ip_CommandBDType EnetcCommandBDConfig; /*!< This will store the configuration of the command BDR. */ 1946 boolean PcieAerUncorrectableErrEnabled; /*!< Uncorrectable error reporting enabled/disabled. */ 1947 boolean PcieAerCorrectableErrEnabled; /*!< Correctable error reporting enabled/disabled. */ 1948 Netc_Eth_Ip_PcieAerErrorReportingCallbackType PcieAerErrorReportingCallback; 1949 } Netc_Eth_Ip_StateType; 1950 /** @endcond DRIVER_INTERNAL_USE_ONLY */ 1951 1952 /** 1953 * @brief Controller configuration for a SI from ENETC. 1954 * @details This will be used for Netc_Eth_Init. The SI type will generate the specific configuration. 1955 */ 1956 typedef struct 1957 { 1958 Netc_Eth_Ip_StationInterfaceType SiType; /*!< The type of the SI (PSI or VSI). */ 1959 const Netc_Eth_Ip_EnetcGeneralConfigType *generalConfig; /*!< ENETC Base Register configuration. Only used for PSI, NULL_PTR for VSI. */ 1960 const Netc_Eth_Ip_StationInterfaceConfigType *siConfig; /*!< ENETC Station Interface Register configuration. */ 1961 Netc_Eth_Ip_StateType *stateStructure; /*!< State structure for current controller. */ 1962 const Netc_Eth_Ip_RxRingConfigType (*paCtrlRxRingConfig)[]; /*!< Address of the array where RX rings are configured. */ 1963 const Netc_Eth_Ip_TxRingConfigType (*paCtrlTxRingConfig)[]; /*!< Address of the array where TX rings are configured. */ 1964 uint32 netcClockFrequency; /*!< Netc system clock */ 1965 #if (STD_ON == NETC_ETH_IP_HAS_EXTERNAL_RX_BUFFERS) 1966 uint32 *rxExternalBuffersAddr; /*!< Array that will keep the addresses of the external rx buffers. */ 1967 #endif 1968 uint32 RfsEntriesNb; /*!< Number of Receive Flow Steering Table entries */ 1969 const Netc_Eth_Ip_RfsEntryType (*RfsConfigTable)[]; /*!< Receive Flow Steering configuration table pointer. */ 1970 } Netc_Eth_Ip_ConfigType; 1971 1972 /*! 1973 * @brief User buffer type. 1974 * @implements Netc_Eth_Ip_BufferType_structure 1975 */ 1976 typedef struct 1977 { 1978 uint8 *data; /*!< Pointer to data buffer */ 1979 uint16 length; /*!< Length of the data buffer */ 1980 } Netc_Eth_Ip_BufferType; 1981 1982 /*! 1983 * @brief Defines the timestamp. 1984 * @implements Netc_Eth_Ip_TimestampType_structure 1985 */ 1986 typedef struct 1987 { 1988 uint32 nanoseconds; /*!< Nanoseconds part of the time. */ 1989 uint32 seconds; /*!< The 32 least significant bits of the 48 bits seconds part of the time. */ 1990 uint16 secondsHi; /*!< The 16 most significant bits of the 48 bit seconds part of the time. */ 1991 } Netc_Eth_Ip_TimestampType; 1992 1993 /** @brief Transmit options for a particular frame. */ 1994 typedef struct 1995 { 1996 Netc_Eth_Ip_TxOptionsFlagType Flag; /*!< This option will set the usage of the additional fields. */ 1997 uint8 SwtMgSendingOpt; /*!< Select between: 0 - Switch Port Masquerading 1998 1 - Direct Switch Enqueue */ 1999 uint8 TimestampRefReq; /*!< Valid when SwtMgSendingOpt = 1. Request to capture the timestamp 2000 when the frame's SFD is transmitted by the switch's Ethernet MAC. */ 2001 uint8 IngrOrEgrPortNumber; /*!< Ingress or Egress switch port number this frame is to be injected towards. 2002 Ingress - SwtMgSendingOpt = 0; Egress - SwtMgSendingOpt = 1 */ 2003 uint8 InternalPriority; /*!< Used to determine switch egress queue and buffer pool. SwtMgSendingOpt = 1 */ 2004 uint8 DiscardResilience; /*!< This field is used for congestion management handling within the switch. */ 2005 uint8 TxStartEnable; /*!< Transmit start enable */ 2006 uint32 TxStartTime; /*!< Transmit start time */ 2007 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 2008 uint8 PriorityCodePoint; /*!< Contains the PCP value of the VLAN tag to be inserted in the packet during transmission. */ 2009 uint8 DropEligible; /*!< Contains the DEI value of the VLAN tag to be inserted in the packet during transmission. */ 2010 Netc_Eth_Ip_TxOptionsExtensionFlagType ExtensionFlags; /*!< Indicates what offloads are enabled for this frame. */ 2011 uint8 TagProtocolID; /*!< Contains the TPID of the VLAN tag to be inserted in the packet during transmission. */ 2012 uint16 VlanID; /*!< Identifier of the VLAN tag to be inserted in the packet during transmission. */ 2013 uint32 Timestamp; /*!< Timestamp value used to update packet header field on transmission. */ 2014 #endif 2015 } Netc_Eth_Ip_TxOptionsType; 2016 2017 /*! 2018 * @brief Detailed status of a transmit buffer descriptor. 2019 * TODO: Update when VLAN info will be added. 2020 * @implements Netc_Eth_Ip_TxInfoType_structure 2021 */ 2022 typedef struct 2023 { 2024 Netc_Eth_Ip_TimestampType timestamp; /*!< The timestamp of the transmitted packet. */ 2025 Netc_Eth_Ip_TxStatusType txStatus; /*!< Error status in the descriptor to be transmitted. */ 2026 } Netc_Eth_Ip_TxInfoType; 2027 2028 /*! 2029 * @brief Structure to store detailed status of a receive buffer descriptor. 2030 * TODO: Update when VLAN info will be added. 2031 * @implements Netc_Eth_Ip_RxInfoType_structure 2032 */ 2033 typedef struct 2034 { 2035 Netc_Eth_Ip_RxStatusType rxStatus; /*!< The error code in case of frame not received correct.*/ 2036 boolean L4cksum; /*!< L4 (TCP or UDP) Checksum was validated and found to be correct. */ 2037 boolean L3cksum; /*!< L3 (IPv4) Header Checksum was validated and found to be correct. */ 2038 boolean timestampReceived; /*!< Timestamp received */ 2039 boolean vlanHeaderAvl; /*!< VLAN header extracted */ 2040 uint16 pktLen; /*!< Length of the received packet. */ 2041 Netc_Eth_Ip_HostReasonType hostReason; /*!< Host Reason.*/ 2042 boolean finalDes; /*!< Determines the last buffer descriptor in a chain.*/ 2043 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 2044 Netc_Eth_Ip_VlanType VlanInfo; /*!< Informations of VLAN frames.*/ 2045 #endif 2046 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 2047 Netc_Eth_Ip_TimestampType PacketTimestamp; /*!< The timestamp of the received packet. */ 2048 #endif 2049 } Netc_Eth_Ip_RxInfoType; 2050 2051 /** @brief MSI(message interrupt) table type. */ 2052 typedef struct 2053 { 2054 /* this type of structure is saved in NETC device memory which not supports burst writes and it will rise a bus hardfault in that case 2055 * volatile was added because otherwise compiler optimize writes on memory */ 2056 volatile uint32 *msgAddr; /*!< Address of the mailbox. */ 2057 volatile uint32 RESERVED_0; /*!< NOT USED. */ 2058 volatile uint32 msgData; /*!< Data transmitted by the interrupt event. */ 2059 volatile uint32 controlVector; /*!< */ 2060 } Netc_Eth_Ip_MSITableEntry; 2061 2062 /** @brief MSI table for each SI. */ 2063 typedef struct 2064 { 2065 Netc_Eth_Ip_MSITableEntry msiTable[3U]; /*!< Array with all entries in table. */ 2066 } Netc_Eth_Ip_MSITable; 2067 2068 /** @brief Entry type for MAC filter hash table. */ 2069 typedef struct 2070 { 2071 boolean EntryStatus; /*!< Status of the entry. TRUE - entry in use; FALSE - entry not used yet or deleted. */ 2072 uint8 HashValue; /*!< Hash value for the MAC address. */ 2073 uint8 MACAddr[6U]; /*!< MAC address. */ 2074 } Netc_Eth_Ip_MACFilterHashTableEntryType; 2075 2076 /** @brief Store the counter values for time. */ 2077 typedef struct 2078 { 2079 uint32 nanosecondsL; /*!< Nanoseconds low part of the time. */ 2080 uint32 nanosecondsH; /*!< Nanoseconds high part of the time. */ 2081 } Netc_Eth_Ip_TimeType; 2082 2083 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 2084 #ifdef NETC_ETH_0_USED 2085 /** @brief Management information. 2086 * implements Netc_Eth_Ip_TxManagementInfoType_structure */ 2087 typedef struct 2088 { 2089 Netc_Eth_Ip_TxManagementStateType State; 2090 uint8 CtrlIdx; 2091 uint8 SwitchIndex; 2092 uint8 PortIndex; 2093 uint16 TxTimeStampID; 2094 uint16 TxBuffId; 2095 } Netc_Eth_Ip_TxManagementInfoType; 2096 2097 /** @brief Timestamp information. 2098 * implements Netc_Eth_Ip_TxTimestampInfoType_structure */ 2099 typedef struct 2100 { 2101 uint8 CtrlIdx; 2102 uint8 SwitchIndex; 2103 uint8 PortIndex; 2104 uint16 TxTimeStampID; 2105 Netc_Eth_Ip_TimeType TimestampValue; 2106 } Netc_Eth_Ip_TxTimestampInfoType; 2107 #endif /* NETC_ETH_0_USED */ 2108 2109 /** @brief Timestamp received frame information. 2110 * implements Netc_Eth_Ip_RxTimestampInfoType_structure */ 2111 typedef struct 2112 { 2113 uint8 RingIdx; 2114 uint8 *ReceivedDataPtr; 2115 uint8 SourcePort; 2116 boolean TimestampValueInvalidForSwt; /*!< Mark if the current timestamp is invalid. */ 2117 uint32 TimestampID; /*!< This represents a uniq ID inside a Netc_Eth_Ip_RxTimestampInfo buffer. */ 2118 Netc_Eth_Ip_TimeType TimestampValue; 2119 } Netc_Eth_Ip_RxTimestampInfoType; 2120 2121 #endif /* STD_ON == NETC_ETH_IP_EXTENDED_BUFF */ 2122 2123 /** 2124 * @brief Structure that maps exactly on the upper layer structure Eth_43_NETC_axTxBufferIdxMapType. 2125 * It is used as in/out parameter for the Netc_Eth_Ip_GetMultipleTxFramesStatus in the HLD driver flow 2126 * to retrieve the transmission status for multiple frames. 2127 * Find a solution to use this API on IP driver as well. Right now for IP driver this structure is not useful. 2128 */ 2129 typedef struct Netc_Eth_Ip_axTxBufferIdxMapType 2130 { 2131 uint8 FifoIdx; 2132 uint8* pu8BufferData; 2133 boolean bTxConfirmation; 2134 Netc_Eth_Ip_TxStatusType FrameHasError; 2135 struct Netc_Eth_Ip_axTxBufferIdxMapType *pNextBuffer; 2136 } Netc_Eth_Ip_axTxBufferIdxMapType; 2137 2138 /* implements Netc_Eth_Ip_ErrorCaptureRegLabel_enum */ 2139 typedef enum 2140 { 2141 NONE, /* Default unassigned value */ 2142 SIUPESR, /* This is the uncorrectable programming error status register.*/ 2143 SIUPECTR, /* This is the uncorrectable programming error count register which tracks how many received frames have been dropped by the station interface.*/ 2144 CMESR, /* This is the correctable memory error status register.*/ 2145 SICMESR, /* This is the correctable memory error status register.*/ 2146 UNSBESR, /* This is the uncorrectable non-fatal system bus error status register.*/ 2147 UNSBECTR, /* This is the uncorrectable non-fatal system bus error count register which tracks how many events have been detected.*/ 2148 SIUNSBESR, /* This is the uncorrectable non-fatal system bus error status register.*/ 2149 SIUNSBECTR, /* This is the uncorrectable non-fatal system bus error count register which tracks how many events have been detected.*/ 2150 TBCIR, /* Frame BD prefetching for the station interface ring is stalled. The frame BD consumer index will indicate the last successfully updated BD.*/ 2151 PM0_RERR, /* MAC Receive Frame Error Counter Register(ifInErrorsn)*/ 2152 PM1_RERR, /* MAC Receive Frame Error Counter Register(ifInErrorsn)*/ 2153 PM0_EVENT, 2154 PM1_EVENT, 2155 MAC_MERGE_MMFSECR0, /* A count of received MAC frames / MAC frame fragments rejected due to unknown SMD value or arriving with an SMD-C when no frame is in progress*/ 2156 MAC_MERGE_MMFSECR1, /* A count of received MAC frames / MAC frame fragments rejected due to unknown SMD value or arriving with an SMD-C when no frame is in progress*/ 2157 MAC_MERGE_MMFAECR0, /* A count of MAC frames with reassembly errors.*/ 2158 MAC_MERGE_MMFAECR1, /* A count of MAC frames with reassembly errors.*/ 2159 UNMESR0, /* This is the uncorrectable non-fatal memory error status register 0.*/ 2160 UNMESR1, /* This is the uncorrectable non-fatal memory error status register 1.*/ 2161 UNMECTR, /* This is the uncorrectable non-fatal memory error count register which tracks how many events have been detected.*/ 2162 SIUNMESR0, /* This is the uncorrectable non-fatal memory error status register 0.*/ 2163 SIUNMESR1, /* This is the uncorrectable memory error status register 1.*/ 2164 SIUNMECTR, /* This is the uncorrectable non-fatal memory error count register which tracks how many events have been detected. */ 2165 EMDIOUNIESR, /* This is the EMDIO uncorrectable non-fatal integrity error status register. */ 2166 UNIESR, /* This is the uncorrectable non-fatal integrity error status register. */ 2167 UNIECTR, /* This is the uncorrectable non-fatal integrity error count register which tracks how many events have been detected. */ 2168 TUFSBESR, /* This is the timer uncorrectable fatal system bus error status register. */ 2169 EMDIOUFSBESR, /*This is the EMDIO uncorrectable fatal system bus error status register.*/ 2170 UFSBESR, /* This is the uncorrectable fatal system bus error status register. */ 2171 SIUFSBESR, /* This is the uncorrectable fatal system bus error status register. */ 2172 RBPIR, /* Frame BD prefetching for the station interface ring is stalled. The frame BD producer index will indicate the last successfully updated BD.*/ 2173 UFMESR0, /* This is the uncorrectable fatal memory error status register 0. */ 2174 UFMESR1, /* This is the uncorrectable fatal memory error status register 1. */ 2175 SIUFMESR0, /* This is the uncorrectable fatal memory error status register 0. */ 2176 SIUFMESR1, /* This is the uncorrectable fatal memory error status register 1. */ 2177 UFIESR, /* This is the uncorrectable fatal integrity error status register. */ 2178 SIUFIESR, /* This is the uncorrectable fatal integrity error status register. */ 2179 UNMACESR /* This is the uncorrectable non-fatal MAC error status register.*/ 2180 } Netc_Eth_Ip_ErrorCaptureRegLabel; 2181 2182 /* implements Netc_Eth_Ip_ErrorCaptureRegisterInformation_structure */ 2183 typedef struct 2184 { 2185 uint32 RegRawValueLow; /* Error Capture Register Low part Raw value. The decoding must be done according to documentation 0-31 bits*/ 2186 uint32 RegRawValueHigh; /* Error Capture Register High Raw value. The decoding must be done according to documentation 32-63 bits. For 32bit registers it is set to 0. */ 2187 2188 Netc_Eth_Ip_ErrorCaptureRegLabel RegName; /* Error Capture Register name */ 2189 } Netc_Eth_Ip_ErrorCaptureRegisterInformation; 2190 2191 #if defined(NETC_ETH_IP_FILL_LEVEL_API_ENABLE) 2192 #if (NETC_ETH_IP_FILL_LEVEL_API_ENABLE == STD_ON) 2193 typedef struct 2194 { 2195 uint16 NumberOfUsedBuff; /* Number of buffers currently used. */ 2196 uint16 MaxNumberOfUsedBuff; /* Maximum number of buffers used since the last check. */ 2197 uint16 TotalNumberOfBuff; /* Buffers allocated in total for the current FIFO. */ 2198 }Netc_Eth_Ip_FillLevelInfo; 2199 #endif /* STD_ON == NETC_ETH_IP_FILL_LEVEL_API_ENABLE */ 2200 #endif /* defined(NETC_ETH_IP_FILL_LEVEL_API_ENABLE) */ 2201 2202 2203 /*================================================================================================== 2204 * GLOBAL VARIABLE DECLARATIONS 2205 ==================================================================================================*/ 2206 2207 /*================================================================================================== 2208 * FUNCTION PROTOTYPES 2209 ==================================================================================================*/ 2210 2211 #ifdef __cplusplus 2212 } 2213 #endif 2214 2215 /** @} */ 2216 2217 #endif 2218
