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/hal_nxp-latest/mcux/mcux-sdk/components/video/display/it6161/
Dhdmi_tx.h148 #define HDMI_TX_GENERAL_REG05_REGINTPOL(N) ((N) << HDMI_TX_GENERAL_REG05_REGINTPOL_SHIFT) argument
151 #define HDMI_TX_GENERAL_REG05_REGINTIOMODE(N) ((N) << HDMI_TX_GENERAL_REG05_REGINTIOMODE_SHIFT) argument
157 #define HDMI_TX_INT_FLAGS_REG06_RInt_HPDStus(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_HPDS… argument
160 #define HDMI_TX_INT_FLAGS_REG06_RInt_DDCBusHang(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_DDCB… argument
163 #define HDMI_TX_INT_FLAGS_REG06_RInt_DDCFIFOErr(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_DDCF… argument
166 #define HDMI_TX_INT_FLAGS_REG06_RInt_AudioOvFlwStus(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_Audi… argument
170 #define HDMI_TX_INT_FLAGS_REG08_RInt_PktAVIStus(N) ((N) << HDMI_TX_INT_FLAGS_REG08_RInt_PktA… argument
173 #define HDMI_TX_INT_FLAGS_REG08_RInt_VidStableStus(N) ((N) << HDMI_TX_INT_FLAGS_REG08_RInt_VidS… argument
179 #define HDMI_TX_INT_MASK_REG09_REG_AudioOvFlw(N) ((N) << HDMI_TX_INT_MASK_REG09_REG_AudioOvFlw_S… argument
182 #define HDMI_TX_INT_MASK_REG09_REG_DDCNoACK(N) ((N) << HDMI_TX_INT_MASK_REG09_REG_DDCNoACK_SHI… argument
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Dmipi_rx.h14 #define MIPI_RX_SOFT_RESET_REG05_RegSoftORst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegSoftORst_S… argument
17 #define MIPI_RX_SOFT_RESET_REG05_RegSoftMRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegSoftMRst_S… argument
20 #define MIPI_RX_SOFT_RESET_REG05_RegMPSoftPRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegMPSoftPRst… argument
23 #define MIPI_RX_SOFT_RESET_REG05_RefSoftREFRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RefSoftREFRst… argument
51 #define MIPI_RX_SYS_CONF_REG0C_RegLaneNum(N) ((N - 1U) << MIPI_RX_SYS_CONF_REG0C_RegLaneNum_S… argument
54 #define MIPI_RX_SYS_CONF_REG0C_RegEnPNSwap(N) ((N) << MIPI_RX_SYS_CONF_REG0C_RegEnPNSwap_SHIFT) argument
57 #define MIPI_RX_SYS_CONF_REG0C_RegEnLaneSwap(N) ((N) << MIPI_RX_SYS_CONF_REG0C_RegEnLaneSwap_SHI… argument
62 #define MIPI_RX_SYS_CONF_REG0D_REGINTPOL(N) ((N) << MIPI_RX_SYS_CONF_REG0D_REGINTPOL_SHIFT) argument
69 #define MIPI_RX_CLKBUF_CTRL_REG10_RegGateOCLK(N) ((N) << MIPI_RX_CLKBUF_CTRL_REG10_RegGateOCLK_S… argument
72 #define MIPI_RX_CLKBUF_CTRL_REG10_RegGateMCLK(N) ((N) << MIPI_RX_CLKBUF_CTRL_REG10_RegGateMCLK_S… argument
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/hal_nxp-latest/mcux/mcux-sdk/components/lsm6dso/
Dfsl_lsm.h55 #define LSM_EMB_FUNC_EN_A_REG_SIGN_MOTION_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_SIGN_MOTION_EN_SHI… argument
58 #define LSM_EMB_FUNC_EN_A_REG_TILT_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_TILT_EN_SHIFT) argument
61 #define LSM_EMB_FUNC_EN_A_REG_PEDO_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_PEDO_EN_SHIFT) argument
69 #define LSM_EMB_FUNC_INT1_REG_INT1_FSM_LC(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_FSM_LC_SH… argument
71 #define LSM_EMB_FUNC_INT1_REG_INT1_SIG_MOT(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_SIG_MOT_S… argument
73 #define LSM_EMB_FUNC_INT1_REG_INT1_TILT(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_TILT_SHIF… argument
75 #define LSM_EMB_FUNC_INT1_REG_INT1_STEP_DETECTOR(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_STEP_DETE… argument
84 #define LSM_PAGE_RW_REG_EMB_FUNC_LIR(N) ((N) << LSM_PAGE_RW_REG_EMB_FUNC_LIR_SHIFT) argument
86 #define LSM_PAGE_RW_REG_PAGE_WRITE(N) ((N) << LSM_PAGE_RW_REG_PAGE_WRITE_SHIFT) argument
88 #define LSM_PAGE_RW_REG_PAGE_READ(N) ((N) << LSM_PAGE_RW_REG_PAGE_READ_SHIFT) argument
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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/TransformFunctions/
Darm_dct4_q15.c84 arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N); in arm_dct4_q15()
85 arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N); in arm_dct4_q15()
97 pS2 = pState + (S->N - 1U); in arm_dct4_q15()
138 i = S->N >> 2U; in arm_dct4_q15()
164 arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N); in arm_dct4_q15()
168 arm_shift_q15 (pState, 2, pState, S->N * 2); in arm_dct4_q15()
177 i = (S->N - 1U) >> 2U; in arm_dct4_q15()
222 i = (S->N - 1U) % 0x4U; in arm_dct4_q15()
242 i = S->N >> 2U; in arm_dct4_q15()
292 i = S->N; in arm_dct4_q15()
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Darm_dct4_q31.c87 arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N); in arm_dct4_q31()
88 arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N); in arm_dct4_q31()
100 pS2 = pState + (S->N - 1U); in arm_dct4_q31()
141 i = S->N >> 2U; in arm_dct4_q31()
167 arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N); in arm_dct4_q31()
171 arm_shift_q31 (pState, 2, pState, S->N * 2); in arm_dct4_q31()
180 i = (S->N - 1U) >> 2U; in arm_dct4_q31()
225 i = (S->N - 1U) % 0x4U; in arm_dct4_q31()
245 i = S->N >> 2U; in arm_dct4_q31()
295 i = S->N; in arm_dct4_q31()
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Darm_dct4_f32.c160 arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N); in arm_dct4_f32()
161 arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N); in arm_dct4_f32()
173 pS2 = pState + (S->N - 1U); in arm_dct4_f32()
214 i = S->N >> 2U; in arm_dct4_f32()
240 arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); in arm_dct4_f32()
249 i = (S->N - 1U) >> 2U; in arm_dct4_f32()
294 i = (S->N - 1U) % 0x4U; in arm_dct4_f32()
314 i = S->N >> 2U; in arm_dct4_f32()
364 i = S->N; in arm_dct4_f32()
385 arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N); in arm_dct4_f32()
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Darm_dct4_init_q15.c64 uint16_t N, in arm_dct4_init_q15() argument
72 S->N = N; in arm_dct4_init_q15()
86 switch (N) in arm_dct4_init_q15()
122 arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U); in arm_dct4_init_q15()
Darm_dct4_init_q31.c64 uint16_t N, in arm_dct4_init_q31() argument
72 S->N = N; in arm_dct4_init_q31()
86 switch (N) in arm_dct4_init_q31()
121 arm_rfft_init_q31(S->pRfft, S->N, 0U, 1U); in arm_dct4_init_q31()
Darm_dct4_init_f32.c64 uint16_t N, in arm_dct4_init_f32() argument
73 S->N = N; in arm_dct4_init_f32()
87 switch (N) in arm_dct4_init_f32()
122 arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U); in arm_dct4_init_f32()
/hal_nxp-latest/mcux/mcux-sdk/drivers/cau3/
Dfsl_cau3.h710 const uint8_t *N,
740 const uint8_t *N,
773 const uint8_t *N,
801 const uint8_t *N,
828 const uint8_t *N,
861 const uint8_t *N,
893 const uint8_t *N,
925 const uint8_t *N,
949 const uint8_t *N,
974 const uint8_t *N,
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Dfsl_cau3.c804 static status_t cau3_pkha_clear_regabne(CAU3_Type *base, bool A, bool B, bool N, bool E);
2357 static status_t cau3_pkha_clear_regabne(CAU3_Type *base, bool A, bool B, bool N, bool E) in cau3_pkha_clear_regabne() argument
2373 if (N) in cau3_pkha_clear_regabne()
2513 const uint8_t *N, in cau3_pkha_init_data() argument
2540 …(void)cau3_pkha_clear_regabne(base, (bool)(uintptr_t)A, (bool)(uintptr_t)B, (bool)(uintptr_t)N, (b… in cau3_pkha_init_data()
2547 if (N != NULL) in cau3_pkha_init_data()
2549 (void)cau3_pkha_write_reg(base, kCAU3_PKHA_RegN, 0, N, sizeN); in cau3_pkha_init_data()
2672 …CAU3_Type *base, const uint8_t *N, size_t sizeN, uint8_t *result, size_t *resultSize, cau3_pkha_f2… in cau3_pkha_modR2() argument
2681 cau3_pkha_init_data(base, NULL, 0, NULL, 0, N, sizeN, NULL, 0); in cau3_pkha_modR2()
2703 const uint8_t *N, in cau3_pkha_modmul() argument
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/hal_nxp-latest/mcux/mcux-sdk/drivers/ltc/
Dfsl_ltc.h1190 const uint8_t *N,
1220 const uint8_t *N,
1253 const uint8_t *N,
1281 const uint8_t *N,
1308 const uint8_t *N,
1341 const uint8_t *N,
1373 const uint8_t *N,
1402 const uint8_t *N,
1427 const uint8_t *N,
1448 …LTC_Type *base, const uint8_t *N, uint16_t sizeN, uint8_t *result, uint16_t *resultSize, ltc_pkha_…
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Dfsl_ltc.c178 static status_t ltc_pkha_clear_regabne(LTC_Type *base, bool A, bool B, bool N, bool E);
3823 static status_t ltc_pkha_clear_regabne(LTC_Type *base, bool A, bool B, bool N, bool E) in ltc_pkha_clear_regabne() argument
3839 if (N) in ltc_pkha_clear_regabne()
3976 const uint8_t *N, in ltc_pkha_init_data() argument
4003 …(void)ltc_pkha_clear_regabne(base, (bool)(uintptr_t)A, (bool)(uintptr_t)B, (bool)(uintptr_t)N, (bo… in ltc_pkha_init_data()
4010 if (NULL != N) in ltc_pkha_init_data()
4012 (void)ltc_pkha_write_reg(base, kLTC_PKHA_RegN, 0, N, sizeN); in ltc_pkha_init_data()
4135 …LTC_Type *base, const uint8_t *N, uint16_t sizeN, uint8_t *result, uint16_t *resultSize, ltc_pkha_… in ltc_pkha_modR2() argument
4144 ltc_pkha_init_data(base, NULL, 0, NULL, 0, N, sizeN, NULL, 0); in ltc_pkha_modR2()
4166 const uint8_t *N, in ltc_pkha_modmul() argument
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/hal_nxp-latest/mcux/mcux-sdk/drivers/powerquad/
Dfsl_powerquad_cmsis.c326 uint16_t N, in arm_dct4_init_q31() argument
333 S->N = N; in arm_dct4_init_q31()
338 switch (N) in arm_dct4_init_q31()
379 status = arm_rfft_init_q31(S->pRfft, S->N, 0, 1); in arm_dct4_init_q31()
413 lenPerMatLoop = S->N >= 256U ? 256U : S->N; in arm_dct4_q31()
415 matLoop = (uint8_t)(((S->N - 1U) >> 8U) + 1U); in arm_dct4_q31()
443 PQ_TransformRDCT(POWERQUAD, S->N, pInlineBuffer, pState); in arm_dct4_q31()
450 lenPerMatLoop = S->N >= 128U ? 128U : S->N; in arm_dct4_q31()
452 matLoop = (uint8_t)(((S->N - 1U) >> 7U) + 1U); in arm_dct4_q31()
519 i = S->N / 4U - 1U; in arm_dct4_q31()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/caam/
Dfsl_caam.c7645 const uint8_t *N, in caam_pkha_algorithm_operation_command() argument
7664 if ((N != NULL) && (sizeN != 0U)) in caam_pkha_algorithm_operation_command()
7668 DESC_SET_ADDR(descriptor[4], N); in caam_pkha_algorithm_operation_command()
7778 const uint8_t *N, in caam_pkha_ecc_algorithm_operation_command() argument
7798 DESC_SET_ADDR(descriptor[4], N); in caam_pkha_ecc_algorithm_operation_command()
7967 const uint8_t *N,
7980 const uint8_t *N, in CAAM_PKHA_ModAddNonBlocking() argument
7991 if (CAAM_PKHA_CompareBigNum(A, sizeA, N, sizeN) >= 0) in CAAM_PKHA_ModAddNonBlocking()
7996 if (CAAM_PKHA_CompareBigNum(B, sizeB, N, sizeN) >= 0) in CAAM_PKHA_ModAddNonBlocking()
8006 …status = caam_pkha_algorithm_operation_command(base, handle, descriptor, A, sizeA, B, sizeB, N, si… in CAAM_PKHA_ModAddNonBlocking()
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Dfsl_caam.h3094 const uint8_t *N,
3126 const uint8_t *N,
3161 const uint8_t *N,
3191 const uint8_t *N,
3220 const uint8_t *N,
3255 const uint8_t *N,
3289 const uint8_t *N,
3320 const uint8_t *N,
3347 const uint8_t *N,
3370 const uint8_t *N,
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/hal_nxp-latest/mcux/mcux-sdk/components/rtt/RTT/
DSEGGER_RTT_ASM_ARMv7M.S159 …BCC.N _CheckCase4 // if (RdOff <= WrOff) { => Cas…
167 BCC.N _CheckCase2 // if (Avail >= NumBytes) { => Case 1)?
196 …BCC.N _Case3 // if (Avail >= NumBytes) { => Case 2? => If no…
214 BEQ.N _No2ChunkNeeded // if (NumBytes) {
232 …BCS.N _Case4 // if (Avail >= NumBytes) { => Case 4) == 1) ? => If…
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/dsp/
Dtransform_functions.h454 uint16_t N; /**< length of the DCT4. */ member
478 uint16_t N,
500 uint16_t N; /**< length of the DCT4. */ member
524 uint16_t N,
546 uint16_t N; /**< length of the DCT4. */ member
570 uint16_t N,
Dutils.h45 #define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S)) argument
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core_AArch64/Include/
Dcmsis_compiler.h86 #define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas argument
/hal_nxp-latest/mcux/middleware/wifi_nxp/
DREADME.txt57 * NSS N*N MIMO spatial stream\n
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/drivers/
Dfsl_clock.c86 static uint32_t pllEncodeN(uint32_t N);
715 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN() argument
720 switch (N) in pllEncodeN()
736 for (i = N; i <= NVALMAX; i++) in pllEncodeN()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/drivers/
Dfsl_clock.c86 static uint32_t pllEncodeN(uint32_t N);
715 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN() argument
720 switch (N) in pllEncodeN()
736 for (i = N; i <= NVALMAX; i++) in pllEncodeN()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/drivers/
Dfsl_clock.c85 static uint32_t pllEncodeN(uint32_t N);
617 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN() argument
622 switch (N) in pllEncodeN()
638 for (i = N; i <= NVALMAX; i++) in pllEncodeN()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_cm0.h207 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
258 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member

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