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Searched refs:MU_SR_EP_MASK (Results 1 – 25 of 111) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/mu/
Dfsl_mu.h67 kMU_EventPendingFlag = MU_SR_EP_MASK, /*!< MU event pending. */
357 …return (base->SR & (MU_SR_TEn_MASK | MU_SR_RFn_MASK | MU_SR_GIPn_MASK | MU_SR_EP_MASK | MU_SR_FUP_… in MU_GetStatusFlags()
/hal_nxp-latest/imx/drivers/
Dmu_imx.h522 return (bool)(base->SR & MU_SR_EP_MASK); in MU_IsEventPending()
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MU.h198 #define MU_SR_EP_MASK (0x4U) macro
201 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/mu1/
Dfsl_mu.h83 kMU_EventPendingFlag = MU_STAT_FLAG(MU_SR_EP_MASK), /*!< MU event pending. */
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MU.h254 #define MU_SR_EP_MASK (0x4U) macro
257 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h15613 #define MU_SR_EP_MASK (0x10U) macro
15619 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
DK32L3A60_cm0plus.h15553 #define MU_SR_EP_MASK (0x10U) macro
15559 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h16035 #define MU_SR_EP_MASK (0x10U) macro
16041 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
DMIMXRT685S_cm33.h22856 #define MU_SR_EP_MASK (0x10U) macro
22862 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h20948 #define MU_SR_EP_MASK (0x10U) macro
20954 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h20949 #define MU_SR_EP_MASK (0x10U) macro
20955 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h22856 #define MU_SR_EP_MASK (0x10U) macro
22862 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h27309 #define MU_SR_EP_MASK (0x10U) macro
27315 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
DMIMXRT595S_cm33.h34400 #define MU_SR_EP_MASK (0x10U) macro
34406 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h32773 #define MU_SR_EP_MASK (0x10U) macro
32779 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h41401 #define MU_SR_EP_MASK (0x10U) macro
41407 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h41399 #define MU_SR_EP_MASK (0x10U) macro
41405 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h41399 #define MU_SR_EP_MASK (0x10U) macro
41405 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h32434 #define MU_SR_EP_MASK (0x4U) macro
32440 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
DMIMXRT735S_cm33_core1.h32480 #define MU_SR_EP_MASK (0x4U) macro
32486 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h41401 #define MU_SR_EP_MASK (0x10U) macro
41407 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h34399 #define MU_SR_EP_MASK (0x10U) macro
34405 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h41401 #define MU_SR_EP_MASK (0x10U) macro
41407 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h41399 #define MU_SR_EP_MASK (0x10U) macro
41405 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)
DMIMX8MN6_ca53.h41413 #define MU_SR_EP_MASK (0x10U) macro
41419 …P(x) (((uint32_t)(((uint32_t)(x)) << MU_SR_EP_SHIFT)) & MU_SR_EP_MASK)

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