Searched refs:MUX_5_DC_2 (Results 1 – 2 of 2) sorted by relevance
130 …__IO uint32_t MUX_5_DC_2; /**< Clock Mux 5 Divider 2 Control Register, offs… member
3738 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_5->MUX_5_DC_2 & MC_CGM_MUX_5_DC_2_DE_MASK) >> … in Clock_Ip_Get_P5_CANXL_CHI_CLK_Frequency()3739 …Frequency /= (uint64)((((uint64)IP_MC_CGM_5->MUX_5_DC_2 & (uint64)MC_CGM_MUX_5_DC_2_DIV_MASK) >> (… in Clock_Ip_Get_P5_CANXL_CHI_CLK_Frequency()
