Searched refs:MUX_0_DC_5 (Results 1 – 2 of 2) sorted by relevance
86 …__IO uint32_t MUX_0_DC_5; /**< Clock Mux 0 Divider 5 Control Register, offs… member
1978 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM->MUX_0_DC_5 & MC_CGM_MUX_0_DC_5_DE_MASK) >> MC… in Clock_Ip_Get_LBIST_CLK_Frequency()1979 …Frequency /= (((IP_MC_CGM->MUX_0_DC_5 & MC_CGM_MUX_0_DC_5_DIV_MASK) >> MC_CGM_MUX_0_DC_5_DIV_SHIFT… in Clock_Ip_Get_LBIST_CLK_Frequency()
