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Searched refs:MSCM_OCMDR5_OCMSZH_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h25750 #define MSCM_OCMDR5_OCMSZH_MASK (0x10000000U) macro
25756 … (((uint32_t)(((uint32_t)(x)) << MSCM_OCMDR5_OCMSZH_SHIFT)) & MSCM_OCMDR5_OCMSZH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h27919 #define MSCM_OCMDR5_OCMSZH_MASK (0x10000000U) macro
27925 … (((uint32_t)(((uint32_t)(x)) << MSCM_OCMDR5_OCMSZH_SHIFT)) & MSCM_OCMDR5_OCMSZH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h29133 #define MSCM_OCMDR5_OCMSZH_MASK (0x10000000U) macro
29139 … (((uint32_t)(((uint32_t)(x)) << MSCM_OCMDR5_OCMSZH_SHIFT)) & MSCM_OCMDR5_OCMSZH_MASK)
DMCXW727C_cm33_core1.h36885 #define MSCM_OCMDR5_OCMSZH_MASK (0x10000000U) macro
36891 … (((uint32_t)(((uint32_t)(x)) << MSCM_OCMDR5_OCMSZH_SHIFT)) & MSCM_OCMDR5_OCMSZH_MASK)