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Searched refs:MSCM_CPxCFG0_DCSZ_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K118_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K148_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K142W_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K142_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K146_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K144W_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
DS32K144_MSCM.h167 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
170 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h11309 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
11312 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h11309 #define MSCM_CPxCFG0_DCSZ_MASK (0xFF00U) macro
11312 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPxCFG0_DCSZ_SHIFT)) & MSCM_CPxCFG0_DCSZ_MASK)