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Searched refs:MSCM_CP0CFG3_CMP_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K118_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K148_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K142W_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K142_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K146_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K144W_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DS32K144_MSCM.h376 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
379 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MSCM.h341 #define MSCM_CP0CFG3_CMP_MASK (0x8U) macro
344 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MSCM.h345 #define MSCM_CP0CFG3_CMP_MASK (0x8U) macro
348 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h25267 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
25273 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h27436 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
27442 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h28650 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
28656 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)
DMCXW727C_cm33_core1.h36402 #define MSCM_CP0CFG3_CMP_MASK (0x20U) macro
36408 … (((uint32_t)(((uint32_t)(x)) << MSCM_CP0CFG3_CMP_SHIFT)) & MSCM_CP0CFG3_CMP_MASK)