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Searched refs:MRCC_MRCC_CAN1_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h27844 #define MRCC_MRCC_CAN1_DIV_MASK (0xF00U) macro
27847 … (((uint32_t)(((uint32_t)(x)) << MRCC_MRCC_CAN1_DIV_SHIFT)) & MRCC_MRCC_CAN1_DIV_MASK)
DMCXW727C_cm33_core1.h35596 #define MRCC_MRCC_CAN1_DIV_MASK (0xF00U) macro
35599 … (((uint32_t)(((uint32_t)(x)) << MRCC_MRCC_CAN1_DIV_SHIFT)) & MRCC_MRCC_CAN1_DIV_MASK)