Home
last modified time | relevance | path

Searched refs:MRCC_BASE (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/
Dfsl_clock.h299 kCLOCK_Ewm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x4C), /*!< Clock ewm0 */
300 kCLOCK_Syspm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x5C), /*!< Clock syspm0 */
301 kCLOCK_Wdog0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x68), /*!< Clock wdog0 */
302 kCLOCK_Wdog1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x6C), /*!< Clock wdog1 */
303 kCLOCK_Sfa0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x74), /*!< Clock sfa0 */
304 kCLOCK_Crc0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x8C), /*!< Clock crc0 */
305 kCLOCK_Secsubsys = MAKE_MRCC_REGADDR(MRCC_BASE, 0x90), /*!< Clock secsubsys */
306 kCLOCK_Lpit0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xBC), /*!< Clock lpit0 */
307 kCLOCK_Tstmr0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC0), /*!< Clock tstmr0 */
308 kCLOCK_Tpm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC4), /*!< Clock tpm0 */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/
Dfsl_clock.h278 kCLOCK_Ewm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x4C), /*!< Clock ewm0 */
279 kCLOCK_Syspm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x5C), /*!< Clock syspm0 */
280 kCLOCK_Wdog0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x68), /*!< Clock wdog0 */
281 kCLOCK_Wdog1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x6C), /*!< Clock wdog1 */
282 kCLOCK_Sfa0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x74), /*!< Clock sfa0 */
283 kCLOCK_Crc0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x8C), /*!< Clock crc0 */
284 kCLOCK_Secsubsys = MAKE_MRCC_REGADDR(MRCC_BASE, 0x90), /*!< Clock secsubsys */
285 kCLOCK_Lpit0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xBC), /*!< Clock lpit0 */
286 kCLOCK_Tstmr0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC0), /*!< Clock tstmr0 */
287 kCLOCK_Tpm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC4), /*!< Clock tpm0 */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/
Dfsl_clock.h278 kCLOCK_Ewm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x4C), /*!< Clock ewm0 */
279 kCLOCK_Syspm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x5C), /*!< Clock syspm0 */
280 kCLOCK_Wdog0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x68), /*!< Clock wdog0 */
281 kCLOCK_Wdog1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x6C), /*!< Clock wdog1 */
282 kCLOCK_Sfa0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x74), /*!< Clock sfa0 */
283 kCLOCK_Crc0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x8C), /*!< Clock crc0 */
284 kCLOCK_Secsubsys = MAKE_MRCC_REGADDR(MRCC_BASE, 0x90), /*!< Clock secsubsys */
285 kCLOCK_Lpit0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xBC), /*!< Clock lpit0 */
286 kCLOCK_Tstmr0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC0), /*!< Clock tstmr0 */
287 kCLOCK_Tpm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC4), /*!< Clock tpm0 */
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h24875 #define MRCC_BASE (0x5001C000u) macro
24879 #define MRCC ((MRCC_Type *)MRCC_BASE)
24883 #define MRCC_BASE_ADDRS { MRCC_BASE }
24892 #define MRCC_BASE (0x4001C000u) macro
24894 #define MRCC ((MRCC_Type *)MRCC_BASE)
24896 #define MRCC_BASE_ADDRS { MRCC_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h27044 #define MRCC_BASE (0x5001C000u) macro
27048 #define MRCC ((MRCC_Type *)MRCC_BASE)
27052 #define MRCC_BASE_ADDRS { MRCC_BASE }
27061 #define MRCC_BASE (0x4001C000u) macro
27063 #define MRCC ((MRCC_Type *)MRCC_BASE)
27065 #define MRCC_BASE_ADDRS { MRCC_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h28257 #define MRCC_BASE (0x5001C000u) macro
28261 #define MRCC ((MRCC_Type *)MRCC_BASE)
28265 #define MRCC_BASE_ADDRS { MRCC_BASE }
28274 #define MRCC_BASE (0x4001C000u) macro
28276 #define MRCC ((MRCC_Type *)MRCC_BASE)
28278 #define MRCC_BASE_ADDRS { MRCC_BASE }
DMCXW727C_cm33_core1.h36009 #define MRCC_BASE (0xB919C000u) macro
36013 #define MRCC ((MRCC_Type *)MRCC_BASE)
36017 #define MRCC_BASE_ADDRS { MRCC_BASE }
36026 #define MRCC_BASE (0xA919C000u) macro
36028 #define MRCC ((MRCC_Type *)MRCC_BASE)
36030 #define MRCC_BASE_ADDRS { MRCC_BASE }