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Searched refs:MQS_REGS_MQS_CTL_ENB_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h70145 #define MQS_REGS_MQS_CTL_ENB_MASK (0x10000000U) macro
70148 … (((uint32_t)(((uint32_t)(x)) << MQS_REGS_MQS_CTL_ENB_SHIFT)) & MQS_REGS_MQS_CTL_ENB_MASK)
DMIMX8QM6_dsp.h75300 #define MQS_REGS_MQS_CTL_ENB_MASK (0x10000000U) macro
75303 … (((uint32_t)(((uint32_t)(x)) << MQS_REGS_MQS_CTL_ENB_SHIFT)) & MQS_REGS_MQS_CTL_ENB_MASK)
DMIMX8QM6_cm4_core1.h82997 #define MQS_REGS_MQS_CTL_ENB_MASK (0x10000000U) macro
82999 … (((uint32_t)(((uint32_t)(x)) << MQS_REGS_MQS_CTL_ENB_SHIFT)) & MQS_REGS_MQS_CTL_ENB_MASK)
DMIMX8QM6_cm4_core0.h82545 #define MQS_REGS_MQS_CTL_ENB_MASK (0x10000000U) macro
82547 … (((uint32_t)(((uint32_t)(x)) << MQS_REGS_MQS_CTL_ENB_SHIFT)) & MQS_REGS_MQS_CTL_ENB_MASK)