Searched refs:MPU_RASR_SRD_Pos (Results 1 – 15 of 15) sorted by relevance
600 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro601 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
591 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro592 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
107 … (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
1206 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1207 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
1223 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1224 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
1281 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1282 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
1504 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1505 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
1286 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1287 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
1513 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro1514 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
73 (0x3 << MPU_RASR_SRD_Pos) | (28 << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()
105 (0x3 << MPU_RASR_SRD_Pos) | (28 << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()133 MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (0xC0 << MPU_RASR_SRD_Pos) | in BOARD_InitMemory()
76 (0x3 << MPU_RASR_SRD_Pos) | (28 << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()
162 (0x3 << MPU_RASR_SRD_Pos) | (28 << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()190 MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (0xC0 << MPU_RASR_SRD_Pos) | in BOARD_InitMemory()
