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Searched refs:MPU_RASR_B_Pos (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mm/
Dboard.c96 …MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (29 << MPU_RASR_SIZE_Pos) | MPU_R… in BOARD_InitMemory()
108 …MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (29 << MPU_RASR_SIZE_Pos) | MPU_R… in BOARD_InitMemory()
137 (0x1 << MPU_RASR_B_Pos) | ((i - 1) << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mq/
Dboard.c99 …MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (29 << MPU_RASR_SIZE_Pos) | MPU_R… in BOARD_InitMemory()
111 …MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (29 << MPU_RASR_SIZE_Pos) | MPU_R… in BOARD_InitMemory()
140 (0x1 << MPU_RASR_B_Pos) | ((i - 1) << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_sc000.h597 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
598 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dcore_cm0plus.h588 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
589 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dmpu_armv7.h92 (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
Dcore_sc300.h1203 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1204 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dcore_cm3.h1220 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1221 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dcore_cm4.h1278 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1279 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dcore_cm7.h1501 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1502 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm0plus.h588 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
589 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dmpu_armv7.h92 (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
Dcore_cm4.h1283 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1284 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
Dcore_cm7.h1510 #define MPU_RASR_B_Pos 16U /*!< MPU … macro
1511 #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU …
/hal_nxp-latest/mcux/mcux-sdk/boards/mekmimx8qm/
Dboard.c133 MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (0xC0 << MPU_RASR_SRD_Pos) | in BOARD_InitMemory()
163 (0x1 << MPU_RASR_B_Pos) | ((i - 1) << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()
/hal_nxp-latest/mcux/mcux-sdk/boards/mekmimx8qx/
Dboard.c190 MPU->RASR = (0x3 << MPU_RASR_AP_Pos) | (0x1 << MPU_RASR_B_Pos) | (0xC0 << MPU_RASR_SRD_Pos) | in BOARD_InitMemory()
220 (0x1 << MPU_RASR_B_Pos) | ((i - 1) << MPU_RASR_SIZE_Pos) | MPU_RASR_ENABLE_Msk; in BOARD_InitMemory()