Searched refs:MMU_STS_IPS_ERR_ADDR_MASK (Results 1 – 13 of 13) sorted by relevance
31895 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro31898 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
31939 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro31942 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
45593 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro45596 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
46429 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro46432 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
34736 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro34739 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
34690 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro34693 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
49228 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro49231 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
48331 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro48334 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
49159 #define MMU_STS_IPS_ERR_ADDR_MASK (0x1FFF0000U) macro49162 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_IPS_ERR_ADDR_SHIFT)) & MMU_STS_IPS_ERR_ADDR_MASK)
