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Searched refs:MMU_STS_INVALID_ADDR_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h31855 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
31863 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT735S_cm33_core1.h31899 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
31907 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT735S_ezhv.h45553 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
45561 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT735S_cm33_core0.h46389 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
46397 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h34696 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
34704 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT758S_hifi1.h34650 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
34658 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT758S_cm33_core0.h49188 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
49196 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT758S_ezhv.h48291 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
48299 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h34650 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
34658 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT798S_cm33_core1.h34696 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
34704 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT798S_hifi4.h49119 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
49127 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT798S_cm33_core0.h49188 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
49196 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)
DMIMXRT798S_ezhv.h48291 #define MMU_STS_INVALID_ADDR_MASK (0x4U) macro
48299 … (((uint32_t)(((uint32_t)(x)) << MMU_STS_INVALID_ADDR_SHIFT)) & MMU_STS_INVALID_ADDR_MASK)