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Searched refs:MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h20298 #define MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK (0x7F000000U) macro
20307 …t)(((uint32_t)(x)) << MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_SHIFT)) & MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h20299 #define MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK (0x7F000000U) macro
20308 …t)(((uint32_t)(x)) << MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_SHIFT)) & MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h27175 #define MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK 0x7F000000u macro
27177 …t32_t)(((uint32_t)(x))<<MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_SHIFT))&MMDC_MPZQLP2CTL_ZQ_LP2_HW_ZQCS_MASK)