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Searched refs:MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h20453 #define MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK (0x7F000000U) macro
20455 …2_t)(((uint32_t)(x)) << MMDC_MPWRDLHWST0_HW_WR_DL_UP1_SHIFT)) & MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h20454 #define MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK (0x7F000000U) macro
20456 …2_t)(((uint32_t)(x)) << MMDC_MPWRDLHWST0_HW_WR_DL_UP1_SHIFT)) & MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h27240 #define MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK 0x7F000000u macro
27242 …int32_t)(((uint32_t)(x))<<MMDC_MPWRDLHWST0_HW_WR_DL_UP1_SHIFT))&MMDC_MPWRDLHWST0_HW_WR_DL_UP1_MASK)