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Searched refs:MICFIL0FCLKDIV_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h919 #define MICFIL0FCLKDIV_OFFSET 0x784 macro
1741 …kCLOCK_DivMicfil0Clk = CLKCTL3_TUPLE_MUXA(MICFIL0FCLKDIV_OFFSET, 0), /*!< DMIC0 Clk Divider…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h919 #define MICFIL0FCLKDIV_OFFSET 0x784 macro
1741 …kCLOCK_DivMicfil0Clk = CLKCTL3_TUPLE_MUXA(MICFIL0FCLKDIV_OFFSET, 0), /*!< DMIC0 Clk Divider…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h919 #define MICFIL0FCLKDIV_OFFSET 0x784 macro
1741 …kCLOCK_DivMicfil0Clk = CLKCTL3_TUPLE_MUXA(MICFIL0FCLKDIV_OFFSET, 0), /*!< DMIC0 Clk Divider…