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Searched refs:MCM_LMPECR_ER1BR_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
DS32K142W_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
DS32K148_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
DS32K146_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
DS32K144_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
DS32K144W_MCM.h382 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
385 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h12351 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
12357 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h13355 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
13361 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h13350 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
13356 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h56231 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
56237 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h55707 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
55713 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h59615 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
59621 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h60136 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
60142 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h70806 #define MCM_LMPECR_ER1BR_MASK (0x100U) macro
70812 … (((uint32_t)(((uint32_t)(x)) << MCM_LMPECR_ER1BR_SHIFT)) & MCM_LMPECR_ER1BR_MASK)