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Searched refs:MCM_LMDR_CF1_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h12257 #define MCM_LMDR_CF1_MASK (0xF0U) macro
12261 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h13261 #define MCM_LMDR_CF1_MASK (0xF0U) macro
13265 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h13256 #define MCM_LMDR_CF1_MASK (0xF0U) macro
13260 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h56128 #define MCM_LMDR_CF1_MASK (0xF0U) macro
56131 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h55604 #define MCM_LMDR_CF1_MASK (0xF0U) macro
55607 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h59512 #define MCM_LMDR_CF1_MASK (0xF0U) macro
59515 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h60033 #define MCM_LMDR_CF1_MASK (0xF0U) macro
60036 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h70703 #define MCM_LMDR_CF1_MASK (0xF0U) macro
70706 … (((uint32_t)(((uint32_t)(x)) << MCM_LMDR_CF1_SHIFT)) & MCM_LMDR_CF1_MASK)