| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/drivers/ |
| D | fsl_clock.c | 84 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
599 mcgpll0clk /= (FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/drivers/ |
| D | fsl_clock.c | 84 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
623 mcgpll0clk /= (FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/drivers/ |
| D | fsl_clock.c | 84 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
623 mcgpll0clk /= (FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
717 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
717 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
748 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
733 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
746 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
802 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
753 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
752 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
784 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
796 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
763 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
802 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
994 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
994 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
953 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
953 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
993 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
847 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
847 mcgpll0prdiv = ((uint8_t)FSL_FEATURE_MCG_PLL_PRDIV_BASE + MCG_C5_PRDIV0_VAL); in CLOCK_GetPll0Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/ |
| D | fsl_clock.c | 112 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/drivers/ |
| D | fsl_clock.c | 66 #define MCG_C5_PRDIV0_VAL ((uint8_t)(MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT) macro
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