| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/ |
| D | fsl_flexcan.c | 779 flexcan_memset((void *)&base->MB[0], 0, sizeof(base->MB)); in FLEXCAN_Reset()
1648 base->MB[mbIdx].CS = CAN_CS_CODE(kFLEXCAN_TxMbInactive); in FLEXCAN_SetTxMbConfig()
1652 base->MB[mbIdx].CS = 0; in FLEXCAN_SetTxMbConfig()
1656 base->MB[mbIdx].ID = 0x0; in FLEXCAN_SetTxMbConfig()
1657 base->MB[mbIdx].WORD0 = 0x0; in FLEXCAN_SetTxMbConfig()
1658 base->MB[mbIdx].WORD1 = 0x0; in FLEXCAN_SetTxMbConfig()
2248 volatile uint32_t *mbAddr = &(base->MB[0].CS); in FLEXCAN_SetFDTxMbConfig()
2313 base->MB[mbIdx].CS = 0; in FLEXCAN_SetRxMbConfig()
2316 base->MB[mbIdx].ID = 0x0; in FLEXCAN_SetRxMbConfig()
2317 base->MB[mbIdx].WORD0 = 0x0; in FLEXCAN_SetRxMbConfig()
[all …]
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| /hal_nxp-latest/imx/drivers/ |
| D | flexcan.c | 158 base->MB[i].CS = 0x0; in FLEXCAN_Deinit()
159 base->MB[i].ID = 0x0; in FLEXCAN_Deinit()
160 base->MB[i].WORD0 = 0x0; in FLEXCAN_Deinit()
161 base->MB[i].WORD1 = 0x0; in FLEXCAN_Deinit()
385 return (flexcan_msgbuf_t*) &base->MB[msgBufIdx]; in FLEXCAN_GetMsgBufPtr()
403 temp = base->MB[msgBufIdx].CS; in FLEXCAN_LockRxMsgBuf()
695 filterTable = (volatile uint32_t *)&(base->MB[6]); in FLEXCAN_SetRxFifoFilter()
797 return (flexcan_msgbuf_t*)&base->MB; in FLEXCAN_GetRxFifoPtr()
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-connectivity-framework/platform/rt1170/ |
| D | fwk_platform_definitions.h | 13 #ifndef MB
14 #define MB(x) (((uint32_t)x) << 20u) macro
18 #define FLASH_SIZE MB(16U)
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-connectivity-framework/platform/connected_mcu/ |
| D | fwk_platform_definitions.h | 15 #ifndef MB
16 #define MB(x) (((uint32_t)x) << 20u) macro
30 #define PLATFORM_EXTFLASH_TOTAL_SIZE MB(2U)
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| /hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/src/ |
| D | CanEXCEL_Ip_HwAccess.c | 549 void CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info, const uint8 * data, uint8 * MB) in CanXL_SetTxMsgBuffData() argument
551 volatile uint32 * Mb_Data_32 = (volatile uint32 *)MB; in CanXL_SetTxMsgBuffData()
575 MB[idx] = data[idx]; in CanXL_SetTxMsgBuffData()
584 MB[idx] = info->fd_padding; in CanXL_SetTxMsgBuffData()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/gcc/ |
| D | MIMXRT735Sxxxx_cm33_core0_flash1.ld | 51 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT735Sxxxx_cm33_core0_flash.ld | 51 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT735Sxxxx_cm33_core0_ram.ld | 49 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/gcc/ |
| D | MIMXRT798Sxxxx_cm33_core0_flash.ld | 53 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT798Sxxxx_cm33_core0_flash1.ld | 53 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT798Sxxxx_cm33_core0_ram.ld | 51 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| /hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/include/ |
| D | CanEXCEL_Ip_HwAccess.h | 217 void CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info, const uint8 * data, uint8 * MB);
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/gcc/ |
| D | MIMXRT758Sxxxx_cm33_core0_flash.ld | 51 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT758Sxxxx_cm33_core0_flash1.ld | 51 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| D | MIMXRT758Sxxxx_cm33_core0_ram.ld | 49 /* The SRAM region [0x080000-0x3FFFFF] is reserved for CPU0 application, last 2MB non-cacheable dat…
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/ |
| D | evkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript | 307 MEM_WriteU32(0x400d4010, 0x8000001D); // BR0, 64MB
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/ |
| D | evkbmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript | 307 MEM_WriteU32(0x400d4010, 0x8000001D); // BR0, 64MB
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K148_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K118_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K116_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K142W_FLEXCAN.h | 104 } MB[64]; member
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| D | S32K146_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K142_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K144_FLEXCAN.h | 104 } MB[32]; member
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| D | S32K144W_FLEXCAN.h | 104 } MB[64]; member
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