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Searched refs:LSIO__LPCG_GPIO2_BASE (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/drivers/
Dfsl_clock.h299 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.h301 kCLOCK_LSIO_Gpio2 = LPCG_TUPLE(SC_R_GPIO_2, LSIO__LPCG_GPIO2_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h63970 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
63972 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
63974 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
DMIMX8QM6_dsp.h67989 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
67991 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
67993 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
DMIMX8QM6_cm4_core1.h78688 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
78690 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
78692 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
DMIMX8QM6_cm4_core0.h78688 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
78690 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
78692 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h84340 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
84342 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
84344 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h84340 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
84342 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
84344 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h84340 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
84342 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
84344 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h84340 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
84342 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
84344 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h114149 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
114151 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
114153 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h114149 #define LSIO__LPCG_GPIO2_BASE (0x5D4A0000u) macro
114151 #define LSIO__LPCG_GPIO2 ((LSIO_LPCG_GPIO2_Type *)LSIO__LPCG_GPIO2_BASE)
114153 #define LSIO_LPCG_GPIO2_BASE_ADDRS { LSIO__LPCG_GPIO2_BASE }

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