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Searched refs:LPUART2_IRQn (Results 1 – 25 of 87) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/boards/frdmke17z512/
Dboard.h26 #define BOARD_UART_IRQ LPUART2_IRQn
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1020/
Dboard.h122 #define BOARD_SERIAL_MWM_PORT_IRQn LPUART2_IRQn
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_COMMON.h270 LPUART2_IRQn = 143, /**< TX and RX interrupt */ enumerator
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_glue_mcux.h82 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn, LPUART3_IR…
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Dboard.h37 #define BOARD_UART_IRQ LPUART2_IRQn
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1160/
Dboard.h36 #define BOARD_UART_IRQ LPUART2_IRQn
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Dboard.h41 #define BOARD_UART_IRQ LPUART2_IRQn
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h511 #define PM_WSID_LPUART2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(LPUART2_IRQn) /*!< LP…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h511 #define PM_WSID_LPUART2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(LPUART2_IRQn) /*!< LP…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h511 #define PM_WSID_LPUART2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(LPUART2_IRQn) /*!< LP…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h511 #define PM_WSID_LPUART2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(LPUART2_IRQn) /*!< LP…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h511 #define PM_WSID_LPUART2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(LPUART2_IRQn) /*!< LP…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h100 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
6540 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
6541 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h100 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
6541 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
6542 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h98 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
6539 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
6540 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h100 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9742 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9743 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h92 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9572 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9573 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h100 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9746 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9747 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h100 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9744 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9745 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h104 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9097 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9098 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h92 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9574 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9575 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h104 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9099 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9100 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h92 LPUART2_IRQn = 14, /**< Single interrupt vector for all sources */ enumerator
9573 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
9574 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h113 …LPUART2_IRQn = 37, /**< LPUART2 status and error (INTMUX source IRQ5… enumerator
10875 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
10876 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h113 …LPUART2_IRQn = 37, /**< LPUART2 status and error (INTMUX source IRQ5… enumerator
10875 #define LPUART_RX_TX_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }
10876 #define LPUART_ERR_IRQS { LPUART0_IRQn, LPUART1_IRQn, LPUART2_IRQn }

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