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Searched refs:LPSPI_DMR0_MATCH0_MASK (Results 1 – 25 of 130) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_LPSPI.h374 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
377 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K148_LPSPI.h382 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
385 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K118_LPSPI.h378 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
381 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K144_LPSPI.h382 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
385 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K146_LPSPI.h382 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
385 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K142W_LPSPI.h382 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
385 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K142_LPSPI.h378 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
381 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
DS32K144W_LPSPI.h382 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
385 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPSPI.h414 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
417 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h5268 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
5272 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h5269 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
5273 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h5267 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
5271 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h8301 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8305 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h8186 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8189 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h8305 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8309 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h8303 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8307 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h7832 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
7836 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h8188 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8191 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h7834 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
7838 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h8187 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
8190 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h10485 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
10489 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h9528 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
9531 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h9528 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
9531 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h11489 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
11493 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h11484 #define LPSPI_DMR0_MATCH0_MASK (0xFFFFFFFFU) macro
11488 … (((uint32_t)(((uint32_t)(x)) << LPSPI_DMR0_MATCH0_SHIFT)) & LPSPI_DMR0_MATCH0_MASK)

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