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Searched refs:LPSPI_CFGR1_PINCFG_MASK (Results 1 – 25 of 132) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpflexcomm/lpspi/
Dfsl_lpspi.c239 …base->CFGR1 = (base->CFGR1 & ~(LPSPI_CFGR1_OUTCFG_MASK | LPSPI_CFGR1_PINCFG_MASK | LPSPI_CFGR1_NOS… in LPSPI_MasterInit()
347 base->CFGR1 = (base->CFGR1 & ~(LPSPI_CFGR1_OUTCFG_MASK | LPSPI_CFGR1_PINCFG_MASK)) | in LPSPI_SlaveInit()
829 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
951 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
1209 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_LPSPI.h355 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
358 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K148_LPSPI.h363 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
366 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K118_LPSPI.h359 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
362 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K144_LPSPI.h363 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
366 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K146_LPSPI.h363 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
366 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K142W_LPSPI.h363 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
366 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K142_LPSPI.h359 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
362 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
DS32K144W_LPSPI.h363 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
366 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpspi/
Dfsl_lpspi.c315 …base->CFGR1 = (base->CFGR1 & ~(LPSPI_CFGR1_OUTCFG_MASK | LPSPI_CFGR1_PINCFG_MASK | LPSPI_CFGR1_NOS… in LPSPI_MasterInit()
420 base->CFGR1 = (base->CFGR1 & ~(LPSPI_CFGR1_OUTCFG_MASK | LPSPI_CFGR1_PINCFG_MASK)) | in LPSPI_SlaveInit()
886 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
1200 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
1365 uint32_t temp = (base->CFGR1 & LPSPI_CFGR1_PINCFG_MASK);
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPSPI.h395 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
398 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h5241 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
5249 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h5242 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
5250 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h5240 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
5248 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h8271 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8279 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h8156 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8164 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h8275 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8283 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h8273 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8281 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h7805 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
7813 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h8158 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8166 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h7807 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
7815 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h8157 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
8165 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h10455 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
10463 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h9498 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
9506 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h9498 #define LPSPI_CFGR1_PINCFG_MASK (0x3000000U) macro
9506 … (((uint32_t)(((uint32_t)(x)) << LPSPI_CFGR1_PINCFG_SHIFT)) & LPSPI_CFGR1_PINCFG_MASK)

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