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Searched refs:LPI2C_MCCR1_SETHOLD_MASK (Results 1 – 25 of 131) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_LPI2C.h472 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
475 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K116_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K118_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K142W_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K146_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K142_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K144W_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
DS32K144_LPI2C.h468 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
471 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPI2C.h477 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
480 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_LPI2C.h513 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
516 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h3991 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
3995 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h3992 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
3996 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h3990 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
3994 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h6876 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6880 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h6768 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6771 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h6880 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6884 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h6878 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6882 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h6551 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6555 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h6770 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6773 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h6553 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6557 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h6769 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
6772 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h9056 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
9060 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h8122 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
8125 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h8122 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
8125 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h10060 #define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U) macro
10064 … (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)

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