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Searched refs:LPDDR_DENALI_CTL_DRAM_CLASS (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8ulp/
Dboard.c2251 LPDDR->DENALI_CTL[0] = LPDDR_DENALI_CTL_START_MASK | LPDDR_DENALI_CTL_DRAM_CLASS(0xb); in BOARD_DramExitRetention()
2259 LPDDR->DENALI_CTL[0] = LPDDR_DENALI_CTL_START_MASK | LPDDR_DENALI_CTL_DRAM_CLASS(0x7); in BOARD_DramExitRetention()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h24871 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8UD7_dsp0.h24990 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8UD7_cm33.h25896 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h25896 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8UD3_dsp0.h24990 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h24288 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8UD5_dsp0.h23403 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h23403 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8US5_cm33.h24288 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h24990 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro
DMIMX8US3_cm33.h25896 #define LPDDR_DENALI_CTL_DRAM_CLASS(x) (((uint32_t)(((uint32_t)(x)) << LPDDR_DENALI_CTL_D… macro