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Searched refs:LMEM_PCCLCR_TDSEL_MASK (Results 1 – 25 of 54) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K148_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K118_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K116_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K142W_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K146_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K144W_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
DS32K144_LMEM.h165 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
168 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h8243 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
8249 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h9247 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
9253 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h9242 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
9248 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h14874 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
14880 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h14868 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
14874 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h14315 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
14321 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h14313 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
14319 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h16980 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
16986 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h18797 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
18803 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h18797 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
18803 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h12920 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
12926 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h12921 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
12927 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h38498 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
38504 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h38498 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
38504 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h38498 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
38504 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h38498 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
38504 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h38498 #define LMEM_PCCLCR_TDSEL_MASK (0x10000U) macro
38504 … (((uint32_t)(((uint32_t)(x)) << LMEM_PCCLCR_TDSEL_SHIFT)) & LMEM_PCCLCR_TDSEL_MASK)

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