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Searched refs:LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h39146 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39148 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h39144 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39146 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h39144 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39146 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h39146 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39148 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h39146 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39148 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h39144 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39146 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
DMIMX8MN6_ca53.h39158 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39160 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h37956 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
37958 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h37956 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
37958 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h37956 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
37958 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h24859 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK 0xFFC00u macro
24861 …t)(((uint32_t)(x))<<LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT))&LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h37956 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
37958 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h37956 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
37958 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h28999 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK 0xFFC00u macro
29001 …t)(((uint32_t)(x))<<LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT))&LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
DMIMX8MM6_ca53.h39856 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39858 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h39847 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
39849 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h71886 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
71888 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h71886 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
71888 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h71886 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
71888 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h71886 #define LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK (0xFFC00U) macro
71888 …(uint32_t)(x)) << LCDIF_DVICTRL3_V2_BLANK_END_LINE_SHIFT)) & LCDIF_DVICTRL3_V2_BLANK_END_LINE_MASK)

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