Home
last modified time | relevance | path

Searched refs:LAYERCLOCKGATE (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/lcdif/
Dfsl_lcdif.c316 base->LAYERCLOCKGATE = (base->LAYERCLOCKGATE & (~LCDIF_LAYERCLOCKGATE_DISABLE_VIDEO_CLK_MASK)) | in LCDIF_SetFrameBufferConfig()
377 …base->LAYERCLOCKGATE = (base->LAYERCLOCKGATE & (~LCDIF_LAYERCLOCKGATE_DISABLE_OVERLAY0_CLK_MASK… in LCDIF_SetOverlayLayerConfig()
392 …base->LAYERCLOCKGATE = (base->LAYERCLOCKGATE & (~LCDIF_LAYERCLOCKGATE_DISABLE_OVERLAY1_CLK_MASK… in LCDIF_SetOverlayLayerConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h28317 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT758S_hifi1.h28273 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT758S_cm33_core0.h42327 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT758S_ezhv.h41928 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h28273 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT798S_cm33_core1.h28317 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT798S_hifi4.h42260 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT798S_cm33_core0.h42327 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member
DMIMXRT798S_ezhv.h41928 __IO uint32_t LAYERCLOCKGATE; /**< Layer Clock Gating, offset: 0x21A0 */ member