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Searched refs:LAR (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/serial_manager/
Dfsl_component_serial_port_swo.c83 ITM->LAR = 0xC5ACCE55U; in Serial_SwoInit()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm7.h1056 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
1154 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ member
Dcore_cm4.h832 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_cm33.h1030 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_ATP.h100 __O uint32_t LAR; /**< Lock Access Register, offset: 0xFB0 */ member
DS32Z2_RTU_PMC.h148 uint32_t LAR; /**< Lock Access Register, offset: 0xFB0 */ member
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_armv8mml.h1022 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
1305 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ member
Dcore_cm7.h1047 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
1145 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ member
Dcore_armv8mbl.h738 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ member
Dcore_sc300.h754 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_cm3.h769 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_cm4.h827 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_cm35p.h1022 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_cm33.h1022 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member
Dcore_armv81mml.h1106 __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ member