| /hal_nxp-latest/s32/drivers/s32k3/Rte/src/ |
| D | SchM_Adc.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 572 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() 589 …if ((ISR_ON(msr_ADC_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ADC_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00() 610 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01() 627 …if ((ISR_ON(msr_ADC_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ADC_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01() 648 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Mcl.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 470 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() 487 …if ((ISR_ON(msr_MCL_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCL_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00() 508 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01() 525 …if ((ISR_ON(msr_MCL_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCL_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01() 546 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Icu.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 462 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 479 …if ((ISR_ON(msr_ICU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ICU_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_00() 500 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_01() 517 …if ((ISR_ON(msr_ICU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ICU_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_01() 538 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Pwm.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 446 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() 463 …if ((ISR_ON(msr_PWM_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_PWM_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_00() 484 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_01() 501 …if ((ISR_ON(msr_PWM_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_PWM_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_01() 522 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Fls.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 386 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() 403 …if ((ISR_ON(msr_FLS_EXCLUSIVE_AREA_10[u32CoreId]))&&(0UL == reentry_guard_FLS_EXCLUSIVE_AREA_10[u3… in SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_10() 424 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_11() 441 …if ((ISR_ON(msr_FLS_EXCLUSIVE_AREA_11[u32CoreId]))&&(0UL == reentry_guard_FLS_EXCLUSIVE_AREA_11[u3… in SchM_Exit_Fls_FLS_EXCLUSIVE_AREA_11() 462 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_12() [all …]
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| D | SchM_Mcu.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 382 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 399 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00() 420 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01() 437 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01() 458 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02() [all …]
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| /hal_nxp-latest/s32/drivers/s32ze/Rte/src/ |
| D | SchM_Adc.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 572 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() 589 …if ((ISR_ON(msr_ADC_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ADC_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_00() 610 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_01() 627 …if ((ISR_ON(msr_ADC_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ADC_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_01() 648 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_EthSwt_43_NETC.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 504 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_EthSwt_43_NETC_ETHSWT_EXCLUSIVE_AREA_00() 521 …if ((ISR_ON(msr_ETHSWT_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ETHSWT_EXCLUSIVE_AREA… in SchM_Exit_EthSwt_43_NETC_ETHSWT_EXCLUSIVE_AREA_00() 542 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_EthSwt_43_NETC_ETHSWT_EXCLUSIVE_AREA_01() 559 …if ((ISR_ON(msr_ETHSWT_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ETHSWT_EXCLUSIVE_AREA… in SchM_Exit_EthSwt_43_NETC_ETHSWT_EXCLUSIVE_AREA_01() 580 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_EthSwt_43_NETC_ETHSWT_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Pwm.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 480 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() 497 …if ((ISR_ON(msr_PWM_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_PWM_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_00() 518 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_01() 535 …if ((ISR_ON(msr_PWM_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_PWM_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_01() 556 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_03() [all …]
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| D | SchM_Mcl.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 470 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() 487 …if ((ISR_ON(msr_MCL_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCL_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_00() 508 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_01() 525 …if ((ISR_ON(msr_MCL_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCL_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Mcl_MCL_EXCLUSIVE_AREA_01() 546 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Icu.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 462 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 479 …if ((ISR_ON(msr_ICU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ICU_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_00() 500 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_01() 517 …if ((ISR_ON(msr_ICU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ICU_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Icu_ICU_EXCLUSIVE_AREA_01() 538 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Eth_43_NETC.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 434 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Eth_43_NETC_ETH_EXCLUSIVE_AREA_00() 451 …if ((ISR_ON(msr_ETH_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_ETH_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Eth_43_NETC_ETH_EXCLUSIVE_AREA_00() 472 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Eth_43_NETC_ETH_EXCLUSIVE_AREA_01() 489 …if ((ISR_ON(msr_ETH_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_ETH_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Eth_43_NETC_ETH_EXCLUSIVE_AREA_01() 510 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Eth_43_NETC_ETH_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Uart.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 420 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() 437 …if ((ISR_ON(msr_UART_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_UART_EXCLUSIVE_AREA_00[… in SchM_Exit_Uart_UART_EXCLUSIVE_AREA_00() 458 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_01() 475 …if ((ISR_ON(msr_UART_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_UART_EXCLUSIVE_AREA_01[… in SchM_Exit_Uart_UART_EXCLUSIVE_AREA_01() 496 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Can_43_CANEXCEL.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 418 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() 435 …if ((ISR_ON(msr_CAN_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_CAN_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() 456 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01() 473 …if ((ISR_ON(msr_CAN_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_CAN_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01() 494 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Spi.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 414 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() 431 …if ((ISR_ON(msr_SPI_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_SPI_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_00() 452 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_01() 469 …if ((ISR_ON(msr_SPI_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_SPI_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Spi_SPI_EXCLUSIVE_AREA_01() 490 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Platform.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 402 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Platform_PLATFORM_EXCLUSIVE_AREA_00() 419 …if ((ISR_ON(msr_PLATFORM_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_PLATFORM_EXCLUSIVE_… in SchM_Exit_Platform_PLATFORM_EXCLUSIVE_AREA_00() 440 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Platform_PLATFORM_EXCLUSIVE_AREA_01() 457 …if ((ISR_ON(msr_PLATFORM_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_PLATFORM_EXCLUSIVE_… in SchM_Exit_Platform_PLATFORM_EXCLUSIVE_AREA_01() 478 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Platform_PLATFORM_EXCLUSIVE_AREA_02() [all …]
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| D | SchM_Mem_43_EXFLS.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 386 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mem_43_EXFLS_MEM_EXCLUSIVE_AREA_10() 403 …if ((ISR_ON(msr_MEM_EXCLUSIVE_AREA_10[u32CoreId]))&&(0UL == reentry_guard_MEM_EXCLUSIVE_AREA_10[u3… in SchM_Exit_Mem_43_EXFLS_MEM_EXCLUSIVE_AREA_10() 424 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mem_43_EXFLS_MEM_EXCLUSIVE_AREA_11() 441 …if ((ISR_ON(msr_MEM_EXCLUSIVE_AREA_11[u32CoreId]))&&(0UL == reentry_guard_MEM_EXCLUSIVE_AREA_11[u3… in SchM_Exit_Mem_43_EXFLS_MEM_EXCLUSIVE_AREA_11() 462 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mem_43_EXFLS_MEM_EXCLUSIVE_AREA_12() [all …]
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| D | SchM_Mcu.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 382 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 399 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00() 420 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01() 437 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01() 458 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02() [all …]
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| /hal_nxp-latest/s32/drivers/s32k1/Rte/src/ |
| D | SchM_Mcu.c | 74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… macro 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 382 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 399 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00() 420 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01() 437 …if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u3… in SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01() 458 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02() [all …]
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