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Searched refs:IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h66309 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
66313 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
DMIMX8QM6_cm4_core0.h66309 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
66313 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h90057 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90061 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h90057 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90061 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h90057 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90061 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h93213 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
93216 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
DMIMX8QX6_cm4.h90059 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90063 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h90059 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90063 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h90058 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90062 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h90059 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90063 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h90060 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90064 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h90060 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90064 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h90056 #define IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK (0x7FFFU) macro
90060 …)) << IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_SHIFT)) & IRIS_MVPL_TCON0_SPG1POSOFF_SPGPSOFF_Y1_MASK)