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Searched refs:IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h65520 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
65534 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
DMIMX8QM6_cm4_core0.h65520 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
65534 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h89268 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89282 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h89268 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89282 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h89268 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89282 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h92342 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
92356 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
DMIMX8QX6_cm4.h89270 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89284 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h89270 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89284 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h89269 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89283 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h89270 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89284 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h89271 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89285 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h89271 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89285 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h89267 #define IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK (0x3U) macro
89281 …(uint32_t)(x)) << IRIS_MVPL_TCON0_CTRL_ChannelMode_SHIFT)) & IRIS_MVPL_TCON0_CTRL_ChannelMode_MASK)