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Searched refs:IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h68062 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
68065 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
DMIMX8QM6_cm4_core0.h68062 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
68065 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h91810 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91813 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h91810 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91813 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h91810 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91813 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h94974 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
94976 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
DMIMX8QX6_cm4.h91812 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91815 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h91812 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91815 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h91811 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91814 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h91812 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91815 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h91813 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91816 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h91813 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91816 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h91809 #define IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT (8U) macro
91812 …ONTROL4_AlphaMask4(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_SIG0_EVALCONTROL4_AlphaMask4_SHIFT…