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Searched refs:IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h52786 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
52790 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
DMIMX8QM6_cm4_core0.h52786 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
52790 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h76534 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76538 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h76534 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76538 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h76534 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76538 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h79139 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
79142 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
DMIMX8QX6_cm4.h76536 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76540 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h76536 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76540 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h76535 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76539 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h76536 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76540 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h76537 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76541 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h76537 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76541 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h76533 #define IRIS_MVPL_MATRIX9_BLUE0_A31_MASK (0x1FFFU) macro
76537 …int32_t)(((uint32_t)(x)) << IRIS_MVPL_MATRIX9_BLUE0_A31_SHIFT)) & IRIS_MVPL_MATRIX9_BLUE0_A31_MASK)