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Searched refs:IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h63954 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
63965 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
DMIMX8QM6_cm4_core0.h63954 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
63965 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h87702 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87713 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h87702 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87713 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h87702 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87713 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h90718 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
90729 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
DMIMX8QX6_cm4.h87704 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87715 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h87704 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87715 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h87703 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87714 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h87704 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87715 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h87705 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87716 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h87705 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87716 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h87701 #define IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SHIFT (4U) macro
87712 …OL_AlphaMaskMode(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_LAYERBLEND3_CONTROL_AlphaMaskMode_SH…