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Searched refs:IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h64450 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
64453 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
DMIMX8QM6_cm4_core0.h64450 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
64453 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h88198 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88201 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h88198 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88201 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h88198 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88201 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h91243 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
91245 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
DMIMX8QX6_cm4.h88200 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88203 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h88200 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88203 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h88199 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88202 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h88200 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88203 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h88201 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88204 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h88201 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88204 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h88197 #define IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT (31U) macro
88200 …0_INT1CONFIG_Int1En(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_INT1CONFIG_Int1En_SHIFT…