Home
last modified time | relevance | path

Searched refs:IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h64893 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
64896 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
DMIMX8QM6_cm4_core0.h64893 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
64896 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h88641 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88644 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h88641 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88644 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h88641 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88644 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h91693 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
91695 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
DMIMX8QX6_cm4.h88643 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88646 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h88643 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88646 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h88642 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88645 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h88643 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88646 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h88644 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88647 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h88644 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88647 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h88640 #define IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHIFT (16U) macro
88643 …ATCLR_ClrSecStat(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FRAMEGEN0_FGCHSTATCLR_ClrSecStat_SHI…