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Searched refs:IRIS_MVPL_FETCHECO2_START_Start_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h57886 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
57890 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
DMIMX8QM6_cm4_core0.h57886 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
57890 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h81634 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81638 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h81634 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81638 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h81634 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81638 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h84398 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
84401 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
DMIMX8QX6_cm4.h81636 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81640 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h81636 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81640 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h81635 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81639 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h81636 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81640 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h81637 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81641 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h81637 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81641 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h81633 #define IRIS_MVPL_FETCHECO2_START_Start_MASK (0x1U) macro
81637 …(((uint32_t)(x)) << IRIS_MVPL_FETCHECO2_START_Start_SHIFT)) & IRIS_MVPL_FETCHECO2_START_Start_MASK)