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Searched refs:IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h58500 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
58504 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
DMIMX8QM6_cm4_core0.h58500 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
58504 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h82248 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82252 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h82248 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82252 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h82248 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82252 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h85047 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
85050 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
DMIMX8QX6_cm4.h82250 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82254 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h82250 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82254 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h82249 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82253 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h82250 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82254 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h82251 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82255 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h82251 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82255 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h82247 #define IRIS_MVPL_FETCHDECODE_START_4_Start_MASK (0x1U) macro
82251 …2_t)(x)) << IRIS_MVPL_FETCHDECODE_START_4_Start_SHIFT)) & IRIS_MVPL_FETCHDECODE_START_4_Start_MASK)